Texas Instruments TPS65941120-Q1 User Manual

Table 5-10. Miscellaneous NVM Settings (continued)
Register Name Field Name
TPS65941120-Q1 TPS65941421-Q1 LP876411B5-Q1
Value Description Value Description Value Description
LDO_RV_TIMEO
UT_ REG_2
LDO3_RV_TIME
OUT
0xf 16ms 0xf 16ms
LDO4_RV_TIME
OUT
0xf 16ms 0xf 16ms
USER_SPARE_R
EGS
USER_SPARE_1 0x0 0x0 0x0 0x0 0x0 0x0
USER_SPARE_2 0x0 0x0 0x0 0x0 0x0 0x0
USER_SPARE_3 0x0 0x0 0x0 0x0 0x0 0x0
USER_SPARE_4 0x0 0x0 0x0 0x0 0x0 0x0
ESM_MCU_MOD
E_ CFG
ESM_MCU_EN 0x0 ESM_MCU disabled. 0x0 ESM_MCU disabled. 0x0 ESM_MCU disabled.
ESM_SOC_MOD
E_ CFG
ESM_SOC_EN 0x0 ESM_SoC disabled. 0x0 ESM_SoC disabled.
CUSTOMER_NV
M_ID_REG
CUSTOMER_NV
M_ID
0x0 0x0 0x0 0x0 0x0 0x0
RTC_CTRL_2 XTAL_EN 0x1 Crystal oscillator is
enabled
0x0 Crystal oscillator is
disabled
LP_STANDBY_S
EL
0x0 LDOINT is enabled in
standby state.
0x0 LDOINT is enabled in
standby state.
0x0 Normal standby state
is used.
FAST_BIST 0x0 Logic and analog BIST
is run at BOOT BIST.
0x0 Logic and analog BIST
is run at BOOT BIST.
0x0 Logic and analog BIST
is run at BOOT BIST.
STARTUP_DEST 0x3 ACTIVE 0x3 ACTIVE 0x3 ACTIVE
XTAL_SEL 0x1 9 pF 0x1 9 pF
PFSM_DELAY_R
EG_1
PFSM_DELAY1 0x4e 0x4e 0x0 0x0 0x0 0x0
PFSM_DELAY_R
EG_2
PFSM_DELAY2 0x9d 0x9d 0x9d 0x9d 0x9d 0x9d
PFSM_DELAY_R
EG_3
PFSM_DELAY3 0x0 0x0 0x0 0x0 0x0 0x0
PFSM_DELAY_R
EG_4
PFSM_DELAY4 0x0 0x0 0x0 0x0 0x0 0x0
GENERAL_REG
_0
FAST_BOOT_BI
ST
0x0 LBIST is run during
boot BIST
0x0 LBIST is run during
boot BIST
0x0 LBIST is run during
boot BIST
GENERAL_REG
_1
REG_CRC_EN 0x1 Register CRC enabled 0x1 Register CRC enabled 0x1 Register CRC enabled
5.11 Interface Settings
These settings detail the default interface, interface configurations, and device addresses. These settings cannot
be changed after device startup.
Table 5-11. Interface NVM Settings
Register Name Field Name
TPS65941120-Q1 TPS65941421-Q1 LP876411B5-Q1
Value Description Value Description Value Description
SERIAL_IF_CON
FIG
I2C_SPI_SEL 0x0 I2C 0x0 I2C 0x0 I2C
I2C1_SPI_CRC_
EN
0x0 CRC disabled 0x0 CRC disabled 0x0 CRC disabled
I2C2_CRC_EN 0x0 CRC disabled 0x0 CRC disabled 0x0 CRC disabled
I2C1_ID_REG I2C1_ID 0x48 0x48 0x4c 0x4C 0x58 0x58
I2C2_ID_REG I2C2_ID 0x12 0x12 0x13 0x13 0x14 0x14
Static NVM Settings www.ti.com
30 TPS65941120-Q1, TPS65941421-Q1 and LP876411B5-Q1 PMIC User Guide
for J721S2, PDN-0A
SLVUCJ9 – FEBRUARY 2023
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Texas Instruments TPS65941120-Q1 Specifications

General

Brand	Texas Instruments
Model	TPS65941120-Q1
Category	Microcontrollers
Language	English