6.1 Configured States
In this PDN, the PMIC devices have the following four configured power states:
• Standby
• Active
• MCU Only
• Pwr SoC Error
• Retention
In Figure 6-1, the configured PDN power states are shown, along with the transition conditions to move between
the states. Additionally, the transitions to hardware states, such as SAFE RECOVERY and LP_STANDBY are
shown. The hardware states are part of the fixed device power Finite State Machine (FSM) and described in the
TPS6594-Q1 and LP8764-Q1 data sheets, see Section 8.
Pre-Configurable Finite State Machine (PFSM) Settings www.ti.com
32 TPS65941120-Q1, TPS65941421-Q1 and LP876411B5-Q1 PMIC User Guide
for J721S2, PDN-0A
SLVUCJ9 – FEBRUARY 2023
Submit Document Feedback
Copyright © 2023 Texas Instruments Incorporated
To Next Page
Loading...
