Thytronic SIF5600 - Page 84

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84
SIF5600 - Manual - 03 - 2008
LONG[ 6] E8 IL3r (see IL3)
LONG[ 8] E8 IEr (see IE)
ENUM[10] E8 Cause
0 None
1 Start I>
2 Start I>>
3 Start IE>
4 Start IE>>
5 Trip I>
6 Trip I>>
7 Trip IE>
8 Trip IE>>
B16 [11] E8 Phases
bit 0 IL1
bit 1 IL2
bit 2 IL3
ENUM[12] E8 Blin1r
0 Off
1 On
ENUM[13] E8 Blout1-2r
0 Off
1 On
INT [14] E8 Year
2000,2099 step 1
INT [15] E8 Month
1,12 step 1
INT [16] E8 Day
1,31 step 1
INT [17] E8 Hour
0,23 step 1
INT [18] E8 Minute
0,59 step 1
INT [19] E8 Second
0,59 step 1
INT [20] E8 Millisecond
0,999 step 1
Dimension : 20 registers
Synopsis : class RREG -> ADR=13 (NUM=14), DIM=20
RREG NUM=15 Description : IL1
Framing:
LONG[ 1] IL1 (dir: 1000=1 A; rel: 1000=1 In)
Dimension : 2 registers
Synopsis : class RREG -> ADR=14 (NUM=15), DIM=2
RREG NUM=16 Description : IL2
Framing:
LONG[ 1] IL2 (dir: 1000=1 A; rel: 1000=1 In)
Dimension : 2 registers
Synopsis : class RREG -> ADR=15 (NUM=16), DIM=2
RREG NUM=17 Description : IL3
Framing:
LONG[ 1] IL3 (dir: 1000=1 A; rel: 1000=1 In)
Dimension : 2 registers
Synopsis : class RREG -> ADR=16 (NUM=17), DIM=2
RREG NUM=18 Description : IE
Framing:
LONG[ 1] IE (dir: 100000=1 A; rel: 100000=1 In)
Dimension : 2 registers
Synopsis : class RREG -> ADR=17 (NUM=18), DIM=2
RREG NUM=19 Description : Blin1 state
Framing:
ENUM[ 1] Blin1
0 Off
1 On
Dimension : 1 register
Synopsis : class RREG -> ADR=18 (NUM=19), DIM=1
RREG NUM=20 Description : Blout1-Blout2 state
Framing:
ENUM[ 1] Blout1-2
0 Off