Thytronic SIF5600 - Page 86

86
86
SIF5600 - Manual - 03 - 2008
0,10000 step 1
Dimension : 1 register
Synopsis : class RREG -> ADR=29 (NUM=30), DIM=1
RREG NUM=31 Description : Counter trip IE>>
Framing:
INT [ 1] Counter TR IE>>
0,10000 step 1
Dimension : 1 register
Synopsis : class RREG -> ADR=30 (NUM=31), DIM=1
SECTION 7 WREG DESCRIPTION
Nr.of the WREG structures: 48.
Every structure is listed.
WREG NUM=1 Description : Modbus slave address
Framing:
INT [ 1] Address
1,247 step 1
default: 1
Dimension : 1 register
Synopsis : class WREG -> ADR=0 (NUM=1), DIM=1
WREG NUM=2 Description : Modbus configuration
Framing:
ENUM[ 1] Baud rate
0 9600
1 4800
2 2400
3 1200
default: 0
ENUM[ 2] Parity
0 No
1 Even
2 Odd
default: 0
ENUM[ 3] Stop bit
0 1
1 2
default: 0
Dimension : 3 registers
Synopsis : class WREG -> ADR=1 (NUM=2), DIM=3
WREG NUM=3 Description : Modbus delay
Framing:
INT [ 1] Enable TX delay (ms)
0,50 step 1
default: 2
INT [ 2] Start TX delay (ms)
0,10 step 1
default: 1
Dimension : 2 registers
Synopsis : class WREG -> ADR=2 (NUM=3), DIM=2
WREG NUM=4 Description : Set clock
Framing:
INT [ 1] Set year
2000,2099 step 1
INT [ 2] Set month
1,12 step 1
INT [ 3] Set day
1,31 step 1
INT [ 4] Set hour
0,23 step 1
INT [ 5] Set minute
0,59 step 1
INT [ 6] Set second
0,59 step 1
INT [ 7] Set millisecond
0,999 step 1
Dimension : 7 registers
Synopsis : class WREG -> ADR=3 (NUM=4), DIM=7