2 Troubleshooting Procedures 2.4 System Board Troubleshooting
2-20 TECRA M3 Maintenance Manual (960-507)
Table 2-5 Debug port LED boot mode status (1/7)
LED Status Item Contents/Message
Clearance of software reset bit
Permission of A20 line
Start
Initialization for special register and Intel chip set
PIT CH0 initialization (for
HOLD_ON)
BIOS rewrite flag initialization
Transition to protected mode
Boot block checksum (HLT when checksum error
occurred.)
Checksum check (FEF00000h-
FEFF7FFFh)
Checksum check except boot block
B1h EC/KBC rewrite check Transition to BIOS rewriting when required
(HLT when Initialization for SC error occurred) B3H Start initializing the SC
(HLT when processing the SC can not be continued by
the HW failure) B4H
transmission of KB enable command
B2h
Executing initialization of KBC
sequence
Key check at Boot Block
B5h Enabling CPU cache
BIOS signature check B6h
BIOS rewrite request check Checksum error except boot block
(When key rewriting is requested, go to BIOS rewrite
process)
Transition of the process to System
BIOS IRT side
B7h
Rewriting BIOS H/W initialization
Setting of base for Power Management I/O Space
Permission of BIOS writing
Serial interrupt control
Releasing BIOS rewrite protection
Enabling SM Bus I/O space
Enabling SM Bus access
Opening work I/O for SDRAM initialization
Setting FDC port
Initialization of PIT channel 1 (Setting refresh interval to
30ms)
Initialization of PIT, DMAC, PIC
Prohibition of cache
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