2.3 CPU 314-6CF03
The CPU 314-6CF03 bases upon the SPEED7 technology. This sup-
ports the CPU at programming and communication by means of co-
processors that causes a power improvement for highest needs.
n The CPU is programmed in STEP
Ò
7 from Siemens. For this you
may use the SIMA
TIC Manager or TIA Portal from Siemens. Here
the instruction set of the S7-400 from Siemens is used.
n The CPU has a parallel SPEED-Bus that enables the additional
connection of up to 10 modules from the SPEED-Bus periphery.
While the standard peripheral modules are plugged at the right
side of the CPU, the SPEED-Bus peripheral modules are con-
nected via a SPEED-Bus bus connector at the left side of the
CPU.
n The CPU has digital and analog input output components. If there
is no hardware configuration available, the in- and output areas
starting with address 1024 are mapped to the address range of
the CPU.
The following components are integrated:
– Analog input: 4x12Bit, 1xPt100
– Analog output: 2x12Bit
– Digital input: 8xDC 24V with interrupt capability, 4 counter
– Digital input/output: 8xDC 24V, 0.5A
n Modules and CPUs of the System 300S from VIPA and Siemens
may be used at the bus as a mixed configuration.
n The user application is stored in the battery buffered RAM or on
an additionally pluggable MMC storage module.
n The CPU is configured as CPU 317-2DP (6ES7 317-2AJ10-0AB0/
V2.6) from Siemens.
Overview
VIPA System 300S Basics
CPU 314-6CF03
HB140 | CPU | 314-6CF03 | GB | 16-43 13
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