VIPA System 300S - Counter - Parametrization

Bit Name Function
2 SET_SW_GATE By setting the software gate is set (not
allowed in OB 100).
3 reserved -
4 reserved -
5 SET_C_VAL By setting the counter may be temporarily set
to a value, which was pre-set via record set
(9A+x)h before.
6 RES_STS By setting the status bits STS_CMP,
STS_END, STS_OFL
W, STS_UFLW and
STS_ZP are reset.
7 reserved -
8 GET_L_VAL By setting the latch value is transferred to the
process image.
9 RES_C_DO By setting the digital output (DO) is disabled
for the counter
. Then the output may only be
controlled by the process image.
10 RES_SW_GATE By setting the software gate is reset.
12 reserved -
... ... ...
15 reserved -
6.10 Counter - Parametrization
The parametrization takes place in the hardware configurator
. Here,
parameter data are transferred existing of the following components:
Byte Record set Description
16 0h Counter mode C0 ... C3
4 7Fh Diagnostics interrupt
16 80h Edge selection for process interrupt
32 81h Filter value I+0.0 ... I+1.7
16 82 ... 86h C0: Comparison, set, end value, hysteresis, pulse
16 87h C0: Sum parameter (comparison, set, end value, hysteresis and pulse)
16 88 ... 8Ch C1: Comparison, set, end value, hysteresis, pulse
16 8Dh C1: Sum parameter (comparison, set, end value, hysteresis and pulse)
16 8E ... 92h C2: Comparison, set, end value, hysteresis, pulse
16 93h C2: Sum parameter (comparison, set, end value, hysteresis and pulse)
16 94 ... 98h C3: Comparison, set, end value, hysteresis, pulse
16 99h C3: Sum parameter (comparison, set, end value, hysteresis and pulse)
Overview
VIPA System 300SDeployment I/O periphery
Counter - Parametrization
HB140 | CPU | 314-6CF03 | GB | 16-43 152