144 MicroBlaze Development Kit Spartan-3E 1600 Edition User Guide
www.xilinx.com UG257 (v1.1) December 5, 2007
Appendix A: Schematics
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FPGA I/O Banks 0 and 1, Oscillators
IC10B0 represents the connections to I/O Bank 0 on the FPGA. The VCCO input to Bank 0
is 3.3V by default, but can be set to 2.5V using jumper JP9.
IC10B1 represents the connections to I/O Bank 1 on the FPGA.
IC17 is the 50 MHz clock oscillator. Chapter 3, “Clock Sources,” for additional information.
IC16 is an 8-pin DIP socket to insert an alternate clock oscillator with a different frequency.
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