ML505/ML506/ML507 Evaluation Platform www.xilinx.com 15
UG347 (v3.1.1) October 7, 2009
Detailed Description
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Detailed Description
The ML505 Evaluation Platform is shown in Figure 1-2 (front) and Figure 1-3, page 16
(back). The numbered sections on the pages following the figures contain details on each
feature.
Figure 1-2: Detailed Description of Virtex-5 FPGA ML505 Components (Front)
1
4
39
34
UG347_01_102907
8
5
28
29
10
13
6
7
11
26
27
9
40
30
12
45
15
21
36
16
31
24
22
25
32
3
35
44
38
37
System ACE Reset
3
Diff Input Pair
41
Diff Output Pair
Mouse
Keybd
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