Xilinx ML505 User Manual

26 www.xilinx.com ML505/ML506/ML507 Evaluation Platform
UG347 (v3.1.1) October 7, 2009
Chapter 1: ML505/ML506/ML507 Evaluation Platform
R
11. Stereo AC97 Audio Codec
The ML50x board has an AC97 audio codec (U22) to permit audio processing. The Analog
Devices AD1981 Audio Codec supports stereo 16-bit audio with up to 48-kHz sampling.
The sampling rate for record and playback can be different.
Note:
The reset for the AC97 codec is shared with the reset signal for the flash memory chips and
is designed to be asserted at power-on or at system reset.
Separate audio jacks are provided for Microphone, Line In, Line Out, and Headphone. All
jacks are stereo except for Microphone. The Headphone jack is driven by the audio codec's
internal 50-mW amplifier. The SPDIF jack supplies digital audio output from the codec.
Table 1-12 summarizes the audio jacks.
Table 1-13 shows the control pins for the AC 97 audio codec.
26 GPIOLED 1
L18
GPIO LED 1
27 GPIOLED 2
G15
GPIO LED 2
28 GPIOLED 4
G16
GPIO LED 4
29
NC
-
Not Connected
30
NC
-
Not Connected
31
IIC_SCL_EXP
F9
Expansion IIC SCL
32
IIC_SDA_EXP
F8
Expansion IIC SDA
Table 1-11: Additional Expansion I/O Connections (J5) (Cont’d)
J5 Pin Label FPGA Pin Description
Table 1-12: Audio Jacks
Reference Designator Function
P10 Microphone - In
P11 Analog Line - In
P12 Analog Line - Out
P13 Headphone - Out
P14 SPDIF - Out
Table 1-13: Audio Codec Control Connections
Net Name FPGA Pin
AUDIO_BIT_CLK AF18
AUDIO_SDATA_IN AE18
AUDIO_SDATA_OUT AG16
AUDIO_SYNC AF19
FLASH_AUDIO_RESET_B AG17
Downloaded from Elcodis.com electronic components distributor

Xilinx ML505 Specifications

General

Brand	Xilinx
Model	ML505
Category	Motherboard
Language	English