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Xilinx RocketIO User Manual

Xilinx RocketIO
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68 www.xilinx.com RocketIO™ Transceiver User Guide
UG024 (v3.0) February 22, 2007
Chapter 2: Digital Design Considerations
R
When ALIGN_COMMA_MSB is TRUE, the PCS places the comma into the most
significant byte (MSB) of RXDATA in the 2-byte mode. Because the PCS is optimized for
the 2-byte mode, some uncertainty exists in the 4-byte mode as to which byte will contain
the comma, as shown in Table 2-12. See “Receive Data Path 32-bit Alignment” for more
details on this case.
ENPCOMMAALIGN,
ENMCOMMAALIGN
These two alignment ports control how the PMA aligns incoming serial data. It can align
on a minus-comma (negative disparity), a plus-comma (positive disparity), both, or
neither if comma alignment is not desired. These signals are latched inside the transceiver
with RXRECCLK.
Care must be taken not to de-assert these signals at the improper time. Comma detection
may be vulnerable to spurious realignment if RXRECCLK occurs at the wrong time. To
avoid this problem, ENPCOMMAALIGN and ENMCOMMAALIGN should be passed
through a flip-flop that is clocked with RXRECCLK. These flip-flops should be located
near the MGT, and RXRECCLK should use local interconnect (not global clock resources)
to reduce skew. For both top and bottom edges, the best slices to use are in the CLB
immediately to the left of the transceiver, next to the bottom of the transceiver. For the top
side of the chip, this is the fourth CLB row; for the bottom side, the bottom CLB row. For
example, for the XC2VP7, here are the best slices to use for two of the transceivers:
For GT_X0Y1 (top edge), the best slices are SLICE_X15Y72 and SLICE_X15Y73.
For GT_X0Y0 (bottom edge), the best slices are SLICE_X14Y0 and SLICE_X14Y1.
This must be done for each MGT. Figure 2-17 shows this recommendation.
Table 2-12: Possible Locations of Comma Character
ALIGN_COMMA_MSB:
Data Path Width:
1 byte 2 bytes 4 bytes
[7:0] [15:8] [7:0] [31:24] [23:16] [15:8] [7:0]
TRUE √√
FALSE √√√√√√√
Figure 2-17: Synchronizing Comma Align Signals to RXRECCLK
GT_std_
*
ENPCOMMAALIGN
ENMCOMMAALIGN
RXRECCLK
D
D
Q
Q
PCOMMA_CONTROL
MCOMMA_CONTROL
UG024_39_013103
Product Not Recommended for New Designs

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Xilinx RocketIO Specifications

General IconGeneral
BrandXilinx
ModelRocketIO
CategoryTransceiver
LanguageEnglish

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