Xilinx RocketIO User Manual

130 www.xilinx.com RocketIO™ Transceiver User Guide
UG024 (v3.0) February 22, 2007
Appendix A: RocketIO Transceiver Timing Model
R
Clock Pulse Width
ParameterName Format:
T
xPWH
= Minimum pulse width, High state
T
xPWL
= Minimum pulse width, Low state
where
x =REF (REFCLK)
TX (TXUSRCLK)
TX2 (TXUSRCLK2)
RX (RXUSRCLK)
RX2 (RXUSRCLK2)
Pulse Width (Examples):
T
TX2PWL
Minimum pulse width, TX2 clock, Low state
T
REFPWH
Minimum pulse width, Reference clock, High state
Timing Parameter Tables and Diagram
The following four tables list the timing parameters as reported by the implementation
tools relative to the clocks given in Table A-1, along with the RocketIO signals that are
synchronous to each clock. (No signals are synchronous to REFCLK or TXUSRCLK.)
A timing diagram (Figure A-2) illustrates the timing relationships.
• Table A-2, “Parameters Relative to the RX User Clock (RXUSRCLK),” page 130
• Table A-3, “Parameters Relative to the RX User Clock2 (RXUSRCLK2),” page 131
• Table A-4, “Parameters Relative to the TX User Clock2 (TXUSRCLK2),” page 131
• Table A-5, “Miscellaneous Clock Parameters,” page 132
Table A-2: Parameters Relative to the RX User Clock (RXUSRCLK)
Parameter Function Signals
Setup/Hold:
T
GCCK
_CHBI/T
GCKC
_CHBI Control inputs CHBONDI[3:0]
Clock to Out:
T
GCKCO
_CHBO Control outputs CHBONDO[3:0]
Clock:
T
RXPWH
Clock pulse width, High state RXUSRCLK
T
RXPWL
Clock pulse width, Low state RXUSRCLK
Product Not Recommended for New Designs

Xilinx RocketIO Specifications

General

Brand	Xilinx
Model	RocketIO
Category	Transceiver
Language	English