Xilinx RocketIO User Manual

96 www.xilinx.com RocketIO™ Transceiver User Guide
UG024 (v3.0) February 22, 2007
Chapter 2: Digital Design Considerations
R
// rxchariscomma3 -- RXCHARISCOMMA[3]
// rxchariscomma1 -- RXCHARISCOMMA[1]
//
module align_comma_32 ( aligned_data, aligned_rxisk, sync,
usrclk2, rxreset,
rxdata, rxisk,
rxrealign, rxcommadet,
rxchariscomma3, rxchariscomma1 );
output [31:0] aligned_data;
output [3:0] aligned_rxisk;
output sync;
reg [31:0] aligned_data;
reg sync;
input usrclk2;
input rxreset;
input [31:0] rxdata;
input [3:0] rxisk;
input rxrealign;
input rxcommadet;
input rxchariscomma3;
input rxchariscomma1;
reg [15:0] rxdata_reg;
reg [1:0] rxisk_reg;
reg [3:0] aligned_rxisk;
reg byte_sync;
reg [3:0] wait_to_sync;
reg count;
// This process maintains wait_to_sync and count,
// which are used only to
// maintain output sync; this provides some idea
// of when the output is properly
// aligned, with the comma in aligned_data[31:24]. The
// counter is set to a high value
// whenever the elastic buffer is reinitialized;
// that is, upon asserted RXRESET or
// RXREALIGN. Count-down is enabled whenever a
// comma is known to have
// come through the comma detection circuit,
// that is, upon an asserted RXREALIGN
// or RXCOMMADET.
always @ ( posedge usrclk2 )
begin
if ( rxreset )
begin
wait_to_sync <= 4'b1111;
count <= 1'b0;
end
else if ( rxrealign )
begin
wait_to_sync <= 4'b1111;
count <= 1'b1;
Product Not Recommended for New Designs

Xilinx RocketIO Specifications

General

Brand	Xilinx
Model	RocketIO
Category	Transceiver
Language	English