Xilinx VCU118

VCU118 Board User Guide 156
UG1224 (v1.0) December 15, 2016
www.xilinx.com
Appendix B: Master Constraints File Listing
#USB UART
set_property PACKAGE_PIN BB22 [get_ports "USB_UART_CTS"];
set_property IOSTANDARD LVCMOS18 [get_ports "USB_UART_CTS"];
set_property PACKAGE_PIN AY25 [get_ports "USB_UART_RTS"];
set_property IOSTANDARD LVCMOS18 [get_ports "USB_UART_RTS"];
set_property PACKAGE_PIN BB21 [get_ports "USB_UART_RX"];
set_property IOSTANDARD LVCMOS18 [get_ports "USB_UART_RX"];
set_property PACKAGE_PIN AW25 [get_ports "USB_UART_TX"];
set_property IOSTANDARD LVCMOS18 [get_ports "USB_UART_TX"];
# SYSMON
set_property PACKAGE_PIN AP18 [get_ports "SYSMON_SCL "];
set_property IOSTANDARD LVCMOS18 [get_ports "SYSMON_SCL "];
set_property PACKAGE_PIN AP17 [get_ports "SYSMON_SDA "];
set_property IOSTANDARD LVCMOS18 [get_ports "SYSMON_SDA "];
# GPIO DIP SWITCH
set_property PACKAGE_PIN B17 [get_ports "GPIO_DIP_SW1"];
set_property IOSTANDARD LVCMOS12 [get_ports "GPIO_DIP_SW1"];
set_property PACKAGE_PIN G16 [get_ports "GPIO_DIP_SW2"];
set_property IOSTANDARD LVCMOS12 [get_ports "GPIO_DIP_SW2"];
set_property PACKAGE_PIN J16 [get_ports "GPIO_DIP_SW3"];
set_property IOSTANDARD LVCMOS12 [get_ports "GPIO_DIP_SW3"];
set_property PACKAGE_PIN D21 [get_ports "GPIO_DIP_SW4"];
set_property IOSTANDARD LVCMOS12 [get_ports "GPIO_DIP_SW4"];
# GPIO LEDs
set_property PACKAGE_PIN AT32 [get_ports "GPIO_LED0"];
set_property IOSTANDARD LVCMOS12 [get_ports "GPIO_LED0"];
set_property PACKAGE_PIN AV34 [get_ports "GPIO_LED1"];
set_property IOSTANDARD LVCMOS12 [get_ports "GPIO_LED1"];
set_property PACKAGE_PIN AY30 [get_ports "GPIO_LED2"];
set_property IOSTANDARD LVCMOS12 [get_ports "GPIO_LED2"];
set_property PACKAGE_PIN BB32 [get_ports "GPIO_LED3"];
set_property IOSTANDARD LVCMOS12 [get_ports "GPIO_LED3"];
set_property PACKAGE_PIN BF32 [get_ports "GPIO_LED4"];
set_property IOSTANDARD LVCMOS12 [get_ports "GPIO_LED4"];
set_property PACKAGE_PIN AU37 [get_ports "GPIO_LED5"];
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