Xilinx VCU118

VCU118 Board User Guide 159
UG1224 (v1.0) December 15, 2016
www.xilinx.com
Appendix B: Master Constraints File Listing
set_property IOSTANDARD LVCMOS18 [get_ports "PMBUS_ALERT_FPGA"];
# VADJ PGOOD
set_property PACKAGE_PIN AK35 [get_ports "VADJ_1V8_PGOOD_LS"];
set_property IOSTANDARD LVCMOS18 [get_ports "VADJ_1V8_PGOOD_LS"];
# FMC VADJ ON/OFF
set_property PACKAGE_PIN AL29 [get_ports "FMC_VADJ_ON_LS"];
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_VADJ_ON_LS"];
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