Xilinx ZCU102 User Manual

ZCU102 Evaluation Board User Guide www.xilinx.com 86
UG1182 (v1.2) March 20, 2017
Chapter 3: Board Component Descriptions
Table 3-38 lists GTH bank 228 connections.
Table 3-38: ZCU102 GTH Bank 228 Interface Connections
XCZU9EG
(U1) Pin
XCZU9EG (U1) Pin
Name
Schematic Net Name
(2)
Connected To
Pin No. Pin Name Device
R4
MGTHTXP0_228 FMC_HPC0_DP6_C2M_P
B36
DP6_C2M_P
FMC HPC0 J5
R3
MGTHTXN0_228 FMC_HPC0_DP6_C2M_N
B37
DP6_C2M_N
T2
MGTHRXP0_228 FMC_HPC0_DP6_M2C_P
B16
DP6_M2C_P
T1
MGTHRXN0_228 FMC_HPC0_DP6_M2C_N
B17
DP6_M2C_N
P6
MGTHTXP1_228 FMC_HPC0_DP5_C2M_P
A38
DP5_C2M_P
P5
MGTHTXN1_228 FMC_HPC0_DP5_C2M_N
A39
DP5_C2M_N
P2
MGTHRXP1_228 FMC_HPC0_DP5_M2C_P
A18
DP5_M2C_P
P1
MGTHRXN1_228 FMC_HPC0_DP5_M2C_N
A19
DP5_M2C_N
N4
MGTHTXP2_228 FMC_HPC0_DP7_C2M_P
B32
DP7_C2M_P
N3
MGTHTXN2_228 FMC_HPC0_DP7_C2M_N
B33
DP7_C2M_N
M2
MGTHRXP2_228 FMC_HPC0_DP7_M2C_P
B12
DP7_M2C_P
M1
MGTHRXN2_228 FMC_HPC0_DP7_M2C_N
B13
DP7_M2C_N
M6
MGTHTXP3_228 FMC_HPC0_DP4_C2M_P
A34
DP4_C2M_P
M5
MGTHTXN3_228 FMC_HPC0_DP4_C2M_N
A35
DP4_C2M_N
L4
MGTHRXP3_228 FMC_HPC0_DP4_M2C_P
A14
DP4_M2C_P
L3
MGTHRXN3_228 FMC_HPC0_DP4_M2C_N
A15
DP4_M2C_N
L8
MGTREFCLK0P_228 FMC_HPC0_GBTCLK1_M2C_C_P
(1)
B20
GBTCLK1_M2C_P
L7
MGTREFCLK0N_228 FMC_HPC0_GBTCLK1_M2C_C_N
(1)
B21
GBTCLK1_M2C_N
J8
MGTREFCLK1P_228 NC
NA
NA N/A
J7
MGTREFCLK1N_228 NC
NA
NA N/A
Notes:
1. Series capacitor coupled.
2. MGT connections I/O standard not applicable.
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Xilinx ZCU102 Specifications

General

Processor	Quad-core ARM Cortex-A53, Dual-core ARM Cortex-R5
SD Card	MicroSD card slot
Video Outputs	DisplayPort
FPGA	Xilinx Zynq UltraScale+ XCZU9EG-2FFVB1156E
Memory	4GB DDR4 Component Memory
Storage	MicroSD card slot
Ethernet	Gigabit Ethernet
USB	1 x USB 3.0, 1 x USB 2.0
PCIe	PCIe Gen2 x4
Display	DisplayPort
Power Supply	12V DC input
SATA	SATA 3.0
Clocking	Programmable clocks
Operating System Support	PetaLinux