Xilinx Zynq UltraScale+ ZCU208 - Page 49

User I/O
[Figure 2, callout 23, 24, and 25]
The ZCU208 board provides these user and general purpose I/O capabilies:
• Eight sets of three single color LEDs (24 LEDs total) (callout 23)
○ LED_0: DS54
○ LED_1: DS55
○ LED_2: DS56
○ LED_3: DS57
○ LED_4: DS58
○ LED_5: DS59
○ LED_6: DS60
○ LED_7: DS61
• 8-posion user DIP switch (callout 23)
○ GPIO_DIP_SW[7:0]: SW14
• Five user pushbuons and a CPU reset PB switch (callouts 24 and 25)
○ GPIO_SW_[NWCES]: SW8, SW9, SW10, SW11, SW12
○ CPU_RESET: SW13
The detailed RFSoC connecons for the feature described in this secon are documented in the
ZCU208 board XDC le, referenced in Appendix B: Xilinx Design Constraints.
Power and Status LEDs
[Figure 2, area of callouts 17 and 18]
The following table denes the power and status LEDs. For user controlled GPIO LED details, see
User I/O.
Table 20: Power and Status LEDs
Ref. Des.
Schematic Net
Name
LED
Color
Description
DS1 MIO23_LED Green RFSoC U1 Bank 500 GPIO LED
DS2 PS_INIT_B Green/ Red Green: FPGA initialization was successful Red: FPGA initialization is in
progress
DS3 PS_DONE Green RFSoC U1 bit file download is complete
Chapter 3: Board Component Descriptions
UG1410 (v1.0) July 8, 2020 www.xilinx.com
ZCU208 Board User Guide 49
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