Identification.............................................................................. 749
Application............................................................................749
Setting guidelines................................................................. 750
Configurable logic blocks................................................................750
Application.................................................................................750
Setting guidelines...................................................................... 750
Configuration........................................................................ 750
Fixed signal function block FXDSIGN............................................ 752
Identification.............................................................................. 752
Application.................................................................................752
Boolean 16 to Integer conversion B16I.......................................... 753
Identification.............................................................................. 753
Application.................................................................................753
Boolean to integer conversion with logical node
representation, 16 bit BTIGAPC..................................................... 754
Identification.............................................................................. 754
Application.................................................................................754
Integer to Boolean 16 conversion IB16.......................................... 755
Identification.............................................................................. 756
Application.................................................................................756
Integer to Boolean 16 conversion with logic node
representation ITBGAPC................................................................757
Identification.............................................................................. 757
Application.................................................................................757
Elapsed time integrator with limit transgression and overflow
supervision TEIGAPC.....................................................................758
Identification.............................................................................. 758
Application.................................................................................758
Setting guidelines...................................................................... 759
Comparator for integer inputs - INTCOMP..................................... 759
Identification.............................................................................. 759
Application.................................................................................759
Setting guidelines...................................................................... 760
Setting example.........................................................................760
Comparator for real inputs - REALCOMP...................................... 761
Identification.............................................................................. 761
Application.................................................................................761
Setting guidelines...................................................................... 761
Setting example.........................................................................762
Section 18 Monitoring.....................................................................763
Measurement..................................................................................763
Identification.............................................................................. 763
Application.................................................................................763
Table of contents
20 Line distance protection REL670 2.2 IEC
Application manual
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