MC96F6432
9.8 P5 Port ....................................................................................................................................................... 83
9.9 Port Function .............................................................................................................................................. 84
10. Interrupt Controller .......................................................................................................................................... 93
10.1 Overview .................................................................................................................................................. 93
10.2 External Interrupt ...................................................................................................................................... 94
10.3 Block Diagram .......................................................................................................................................... 95
10.4 Interrupt Vector Table ............................................................................................................................... 96
10.5 Interrupt Sequence ................................................................................................................................... 96
10.6 Effective Timing after Controlling Interrupt Bit .......................................................................................... 98
10.7 Multi Interrupt ........................................................................................................................................... 99
10.8 Interrupt Enable Accept Timing .............................................................................................................. 100
10.9 Interrupt Service Routine Address .......................................................................................................... 100
10.10 Saving/Restore General-Purpose Registers ......................................................................................... 100
10.11 Interrupt Timing .................................................................................................................................... 101
10.12 Interrupt Register Overview .................................................................................................................. 101
11. Peripheral Hardware ..................................................................................................................................... 110
11.1 Clock Generator ..................................................................................................................................... 110
11.2 Basic Interval Timer ................................................................................................................................ 113
11.3 Watch Dog Timer ................................................................................................................................... 116
11.4 Watch Timer ........................................................................................................................................... 119
11.5 Timer 0 ................................................................................................................................................... 122
11.6 Timer 1 ................................................................................................................................................... 131
11.7 Timer 2 ................................................................................................................................................... 141
11.8 Timer 3, 4 ............................................................................................................................................... 152
11.9 Buzzer Driver .......................................................................................................................................... 181
11.10 SPI 2..................................................................................................................................................... 183
11.11 12-Bit A/D Converter ............................................................................................................................ 189
11.12 USI0 (UART + SPI + I2C) ..................................................................................................................... 195
11.13 USI1 (UART + SPI + I2C) ..................................................................................................................... 232
11.14 LCD Driver ............................................................................................................................................ 270
12. Power Down Operation ................................................................................................................................. 282
12.1 Overview ................................................................................................................................................ 282
12.2 Peripheral Operation in IDLE/STOP Mode ............................................................................................. 282
12.3 IDLE Mode ............................................................................................................................................. 283
12.4 STOP Mode ............................................................................................................................................ 284
12.5 Release Operation of STOP Mode ......................................................................................................... 285
13. RESET .......................................................................................................................................................... 287
13.1 Overview ................................................................................................................................................ 287
13.2 Reset Source .......................................................................................................................................... 287
13.3 RESET Block Diagram ........................................................................................................................... 287
13.4 RESET Noise Canceller ......................................................................................................................... 288
13.5 Power on RESET ................................................................................................................................... 288
13.6 External RESETB Input .......................................................................................................................... 291
13.7 Brown Out Detector Processor ............................................................................................................... 292
13.8 LVI Block Diagram .................................................................................................................................. 293
13.9 Register Map .......................................................................................................................................... 294
13.10 Reset Operation Register Description .................................................................................................. 294
13.11 Register Description for Reset Operation ............................................................................................. 294
14. On-chip Debug System ................................................................................................................................. 297
14.1 Overview ................................................................................................................................................ 297
14.2 Two-Pin External Interface ..................................................................................................................... 298
15. Flash Memory ............................................................................................................................................... 303
15.1 Overview ................................................................................................................................................ 303