ADLINK Technology VPX3-TL BIOS - Page 14

14
VPX3-TL BIOS
BIOS Item Options Description
Platform PL1 Power 50000 Platform Power Limit 1 Power in Milli
Watts. BIOS will round to the nearest
1/8W when programming. Any value can
be programmed between Max and Min
Power Limits (specified by
PACKAGE_POWER_SKU_MSR). For
12.50W, enter 12500. This setting will act
as the new PL1 value for the Package RAPL
algorithm.
Platform PL1 Time
Window
0 Platform Power Limit 1 Time Window
value in seconds. The value may vary from
0 to 128. 0 = default values. Indicates the
time window over which Platform TDP
value should be maintained.
Platform PL2 Enable Enabled
Disabled
Enable/Disable Platform Power Limit 2
programming. If this option is disabled,
BIOS will program the default values for
Platform Power Limit 2.
Platform PL2 Power 55000 Platform Power Limit 2 Power in Milli
Watts. BIOS will round to the nearest
1/8W when programming. Any value can
be programmed between Max and Min
Power Limits (specified by
PACKAGE_POWER_SKU_MSR). For
12.50W, enter 12500. This setting will act
as the new PL2 value for the Package RAPL
algorithm.
Power Limit 4 Override Enabled
Disabled
Enable/Disable Power Limit 4 override. If
this option is disabled, BIOS will leave the
default values for Power Limit 4.
C states Enabled
Disabled
Enable/Disable CPU Power Management.
Allows CPU to go to C states when it's not
100% utilized.
Thermal Monitor Enabled
Disabled
Enable/Disable Thermal Monitor
Interrupt Redirection
Mode Selection
Fixed Priority
Round robin
Hash Vector
No Change
Interrupt Redirection Mode Select for
Logical Interrupts
Timed MWAIT Enabled
Disabled
Enable/Disable Timed MWAIT Support
Custom P-state Table Submenu
Energy Performance Gain Enabled
Disabled
Enable/disable Energy Performance Gain.
EPG DIMM Idd3N 26 Active standby current (Idd3N) in
milliamps from datasheet. Must be
calculated on a per DIMM basis.
EPG DIMM Idd3P 11 Active power-down current (Idd3P) in
milliamps from datasheet. Must be
calculated on a per DIMM basis.