Chapter 6 347
Using the STATus System
Using the Status Registers
Using the STATus System
Using the Status Registers
Figure on page 353 shows the PSA instrument status registers and
their hierarchy. Note that the some measurement personality Modes
use the E4406A status register design instead of the PSA design.
(These include Basic Mode, NADC/PDC, GSM/EDGE, cdmaOne,
cdma2000/1xEV-DV, W-CDMA/HSDPA and 1xEV-DO.)
• “What Status Registers Are” on page 347
• “Why Use the Status Registers” on page 349
• “Using a Status Register” on page 351
• “Using the Service Request (SRQ) Method” on page 351
• “PSA Core Status Register System” on page 353
• “Standard Event Status Register” on page 358
• “Operation and Questionable Status Registers” on page 361
What Status Registers Are
The status system has multiple registers that are arranged in a
hierarchical order. The lower-level status registers propagate their data
to the higher-level registers in the data structures by means of
summary bits. The status byte register is at the top of the hierarchy
and contains general status information for the instrument’s events
and conditions. All other individual registers are used to determine the
specific events or conditions.
The operation and questionable status registers are sets of registers
that monitor the overall instrument condition. They are accessed with
the STATus:OPERation and STATus:QUEStionable commands in the
STATus command subsystem. Each register set is made up of five
registers:
Condition Register it reports the real-time state of the signals
monitored by this register set.There is no latching or
buffering for a condition register.
Positive Transition Register this filter register controls which signals
will set a bit in the event register when the signal
makes a low to high transition (when the condition bit
changes from 0 to 1).
Negative Transition Register this filter register controls which
signals will set a bit in the event register when the
signal makes a high to low transition (when the
condition bit changes from 1 to 0).
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