Alinx AX7021 - Page 41

ZYNQ FPGA Development Board AX7021 User Manual
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Figure 3-3-1: The connection between Zynq7000 and USB chip
Figure 3-3-2 shows the physical picture of the USB2.0 chip and interface,
where the USB interface uses a dual USB interface.
Figure 3-3-2: The USB2.0 on the Carrier Board
USB2.0 Pin Assignment:
Signal Name
Pin Name
Pin Number
Explain
OTG_DATA4
PS_MIO28_501
A12
USB data bit4
OTG_DIR
PS_MIO29_501
E8
USB data direction
signal
OTG_STP
PS_MIO30_501
A11
USB stop signal
OTG_NXT
PS_MIO31_501
F9
USB next data signal