Alinx AX7021 - Page 50

ZYNQ FPGA Development Board AX7021 User Manual
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Figure 3-10-1: The Expansion Port J15 Schematic
Figure 3-10-2 shows the physical map of the J15 expansion port. Pin39
and Pin40 of the expansion port are indicated on the board.
Figure 3-10-2: The J15 Expansion Port on the Carrier Board
J15 Pin Assignment:
Pin
Signal Name
Pin Name
Pin Number
1
GND
2
+5V（Input）
3
T21
4
U21
5
U20
6
V20
7
Y19
8
AA19
9
J21
10
J22
11
K21
12
J20
13
P16
14
R16
15
M17
16
L17
17
T18
18
R18
19
P20
20
P21