AMLOGIC S905D3 - Page 22

0.6 (2019–07–25)
Amlogic Proprietary and Confidential
Copyright © Amlogic. All rights reserved.
17
Net Name Type Default
Pull UP/
DN
Description Power
Domain
If
Unused
GPIOAO_7 DIO Up General purpose input/output bank AO signal
7
VDDIO_AO NC
GPIOAO_8 DIO Up General purpose input/output bank AO signal
8
VDDIO_AO NC
GPIOAO_9 DIO Down General purpose input/output bank AO signal
9
VDDIO_AO NC
GPIOAO_10 DIO Up General purpose input/output bank AO signal
10
VDDIO_AO NC
GPIOAO_11 DIO Down General purpose input/output bank AO signal
11
VDDIO_AO NC
TEST_N DIO UP SOC test pin and general purpose input/out-
put bank AO signal 12. Should be pulled up
during normal power-on.
VDDIO_AO NC
RESET_N Input DOWN System reset input VDDIO_AO To GND
by 1nF
capacitor
VDDIO_AO P - Power supply for GPIO bank AO VDDIO_AO To 3.3V
GPIOE- Refer to
Table 4-8 for functional multiplex information.
GPIOE_0 DIO Z General purpose input/output bank E signal 0 VDD18_
AO_XTAL
NC
GPIOE_1 DIO Z General purpose input/output bank E signal 1 VDD18_
AO_XTAL
NC
GPIOE_2 DIO Z General purpose input/output bank E signal 2 VDD18_
AO_XTAL
NC
VDD18_
AO_XTAL
P - Power supply for GPIO bank E and XTAL,
IOVREF
- To
VDD18_
AO_
XTAL
SARADC
SARADC_
CH0
AI - ADC channel 0 input AVDD18_
SARADC
NC
SARADC_
CH1
AI - ADC channel 1 input AVDD18_
SARADC
NC
SARADC_
CH2
AI - ADC channel 2 input AVDD18_
SARADC
NC
SARADC_
CH3
AI - ADC channel 3 input AVDD18_
SARADC
NC
AVDD18_
SARADC
P - Analog power supply for SARADC - To 1.8V
CVBS OUT
CVBS_
COMP
A - CVBS external compensation capacitor
connection
AVDD18_
CVBS
NC
CVBS_IOUT AO - Video DAC output AVDD18_
CVBS
NC
CVBS_
RSET
A - CVBS output strength setting resistor AVDD18_
CVBS
NC
S905D3 Quick Reference Manual 4 Pinout Specification
Preliminary Version
Confidential for Wesion!