Chapter 1
Introduction
This chapter introduces Cortex-M3 DesignStart Eval and gives an overview of the FPGA Evaluation
Flow, its directory structure, and limitations.
It contains the following sections:
• 1.1 About Cortex
®
-M3 DesignStart
™
Eval on page 1-12.
• 1.2 About the ARM Versatile Express Cortex-M Prototyping System (V2M-MPS2+) on page 1-14.
• 1.3 Using the documentation on page 1-15.
• 1.4 FPGA Evaluation Flow directory structure on page 1-17.
• 1.5 Limitations on page 1-18.
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