ARM Cortex-M3 DesignStart - 5.1 SCC Interface Overview

5.1 SCC interface overview
The FPGA design implements communication between the microcontroller and the FPGA system
through an SCC interface.
The following diagram provides an overview of the SCC interface:
FPGA
MCU
CFGDATAIN
CFGLOAD
CFGDATAOUT
CFGWnR
CFGCLK
0
31 0
43
Write address
3132
Write data
11
read address
0
0
Read data
fpga_scc_if.v
Read interface
Write interface
Figure 5-1 SCC interface
The read addresses and write addresses of the SCC interface do not use bits [1:0].
All address words are word-aligned.
5 Serial Communication Controller
5.1 SCC interface overview
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