ARM Cortex-M3 DesignStart - 8.2 Utilization of Default System

8.2 Utilization of default system
The FPGA on the MPS2+ platform is an Altera Cyclone V 5CEBA9F31C8.
The following table shows the resources of the FPGA:
Table 8-1 FPGA resources
Resources Value
LUTs 113 560
DFFs 454 240
Memory 3.9Mbit
DSP 342
PLLs 7
The following table shows the Cortex-M3 DesignStart Eval code utilization of FPGA resources:
Table 8-2 Resource utilization
Resources Utilization
LUTs 20%
DFFs 6%
Memory 32%
DSP <1%
PLLs 42%
8 Performance and utilization
8.2 Utilization of default system
ARM 100896_0000_00_en Copyright © 2017 ARM Limited or its affiliates. All rights reserved. 8-57
Non-Confidential