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ARM Cortex-M3 DesignStart - 1.1 About Cortex-M3 DesignStart Eval

ARM Cortex-M3 DesignStart
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1.1 About Cortex
®
-M3 DesignStart
Eval
Cortex-M3 DesignStart Eval provides developers an easy way to develop and simulate SoC designs
based on the ARM Cortex-M3 processor. It allows a system designer to design and test on a simulator
and then proceed with hardware prototyping using an FPGA.
The Cortex-M3 DesignStart Eval package is aimed at developers who are new to ARM or have limited
soft IP system design experience. The package includes the following:
1.1.1 RTL on page 1-12.
1.1.2 Execution Testbench on page 1-13.
1.1.3 FPGA Evaluation Flow on page 1-13.
Cortex-M3 DesignStart Eval provides an easy entry into the ARM ecosystem, rather than a complete
solution for all Cortex-M processor design scenarios.
The hardware ecosystem in Cortex-M3 DesignStart Eval is built around the CoreLink
SSE-050
Subsystem and includes the use of the Cortex-M System Design Kit (CMSDK) standard library of
Advanced High-performance Bus (AHB) and Advanced Peripheral Bus (APB) components. For more
information on the CMSDK, see the ARM
®
Cortex
®
-M System Design Kit Technical Reference Manual.
The software ecosystem in Cortex-M3 DesignStart Eval uses the ARM Cortex Microcontroller Software
Interface Standard (CMSIS) software standard library.
The use of CMSDK and CMSIS, coupled with a reprogrammable FPGA, allows for a fast turnaround
and prototyping of Cortex-M3 processor-based hardware and software.
Cortex-M3 DesignStart Eval does not support the implementation of the Cortex-M3 processor into
silicon. Any implementation of the Cortex-M3 processor into silicon requires you to obtain Cortex-M3
DesignStart Pro, or take a full Cortex-M3 processor license from ARM.
A Cortex-M3 DesignStart Pro license offers the following:
The Cortex-M3 processor.
The SDK-100 System Design Kit (SDK), which includes:
The CoreLink SSE-050 Subsystem.
The CMSDK components.
A Real Time Clock (RTC).
A stand-alone True Random Number Generation (TRNG).
An Embedded Trace Macrocell (ETM) is not included in Cortex-M3 DesignStart Pro, and requires a
separate license.
If you are working on ASIC implementation, then ARM recommends that you license Cortex-M3
DesignStart Pro as early as possible.
1.1.1 RTL
The RTL in Cortex-M3 DesignStart Eval includes the components and peripherals that are required to
implement a complete example system in an FPGA.
The example system is intended to provide a reference starting point for a typical IoT endpoint
application and is a supported ARM mbed
platform when implemented on the ARM Versatile Express
Cortex-M Prototyping System (V2M-MPS2+) platform.
The Cortex-M3 DesignStart Eval RTL provides an example system that includes:
A Cortex-M3 processor in a fixed configuration (obfuscated but synthesizable).
A modified CoreLink SSE-050 subsystem supporting a single Cortex-M3 processor with support for
debug and trace.
A memory subsystem supporting Execute In Place (XIP). The MPS2+ platform preloads a code file
at powerup.
Two timers for Operating System use (privileged access only).
1 Introduction
1.1 About Cortex
®
-M3 DesignStart
Eval
ARM 100896_0000_00_en Copyright © 2017 ARM Limited or its affiliates. All rights reserved. 1-12
Non-Confidential

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