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ARM Cortex-M3 DesignStart User Manual
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A.1
Revisions - Cortex
®
-M3 DesignStart
™
Eval
This section describes the technical changes between released issues of this document.
T
able A-1 Issue 00
Change
Location
Affects
First release
-
-
A Revisions
A.1 Revisions - Cortex
®
-M3 DesignStart
™
Eval
ARM 100896_0000_00_en
Copyright © 2017 ARM Limited or its affiliates. All rights reserved.
Appx-A-59
Non-Confidential
58
Table of Contents
Default Chapter
2
Document History
2
Table of Contents
4
Preface
6
About this Book
7
Feedback
10
Chapter 1 Introduction
11
About Cortex ® -M3 Designstart ™ Eval
12
About the ARM Versatile Express Cortex-M Prototyping System (V2M-MPS2+)
14
Using the Documentation
15
FPGA Evaluation Flow Directory Structure
17
Limitations
18
Chapter 2 Using the Prebuilt FPGA Image
19
Setting up the MPS2+ FPGA Platform
20
Running the Self-Test Program
21
Connecting to a Debugger
23
Chapter 3 FPGA Platform Overview
25
System Overview
25
Memory Map
26
Block RAM Instances
27
External Zero Bus Turnaround SSRAM
28
External PSRAM
29
Arduino Adapter Board
30
Embedded Trace Macrocell Interface
31
CMSDK APB Subsystem
32
Ahb Gpio
33
Serial Peripheral Interface
34
Color LCD Parallel Interface
35
Ethernet
36
Vga
37
Audio I 2 S
38
Audio Configuration
40
FPGA System Control and I/O
41
Chapter 4 Clocks
43
Source Clocks
43
Derived Clocks
44
Chapter 5 Serial Communication Controller
46
SCC Interface Overview
46
SCC Memory Map
47
Build Flow
50
Build Requirements
52
Chapter 6 FPGA Build
53
Chapter 7 Integrating with Mbed
53
Compatibility with Mbed ™ os
53
Performance and Clocks
56
Utilization of Default System
57
Chapter 8 Performance and Utilization
58
Appendix A Revisions
58
Revisions - Cortex -M3 Designstart Eval
59
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ARM Cortex-M3 DesignStart Specifications
General
Brand
ARM
Model
Cortex-M3 DesignStart
Category
Motherboard
Language
English
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