III-3
(6) ROM block
ROMs store the CPU control program and font data. ROMs are two 32Mbit
masked ROMs.
Optional sockets are available for two 8Mbit EPROM (µPD27C8000DZ-120 - NEC
or equivalent) for expansion.
ROM access time should be less than 120nsec.
(7) DRAM block
DRAMs are used for receiving buffer or working area of the CPU. The DRAM
block contains four 16Mbit DRAMs, thus having 8MB memory capacity in total.
The refreshing method is CBR (Cas Before Ras).
DRAM access time should be less than 80nsec.
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