Casio QT-6100 - LSI Block Diagram

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8-2. LSI BLOCK DIAGRAM
BUZZER
DRAWER DRIVE x 2
COMPULSORY SW x 2
LOAD x 2
CLOCK x 2
DATA x 2
SERIAL I/F
ISDN(MODEM)PORT
10M/100MBASE
SH BUS
80Mh
z
PCI BUS
33Mh
z
BUFFER
(IC8, 13, 17)
SDRAM
256MB
(IC12)
FROM
128MB
(IC1)
SVGA
TFT PANEL
(12.1inch
)
TOUCH
PANEL
DALLAS
KEY
DISPLAY
ON/OFF
SW
DRAWER
PORT
X
2
SOFT
WARE
KEY
LCDC IC
(IC45)
SERIAL I/F
3.3V 5
V
CPU
SH-4
SH-7751R
240MHz
(IC26)
I/O
CONTROLLER
78K4
12.5MHz
(IC44)
BUFFER
(IC4, 5, 6, 7)
RS232C
×
1
(COM1)
CF CARD
SLOT
Ethernet
IC
(IC28)
EEP
ROM
(IC35)
LAN
PORT
RTC
(IC19)
RS232C
(COM1~3)
GA
(IC14)
INIT SW
MCR (OPTION)
(OPTION)