42 – Monitoring T2S - ETH User Manual – v1.4
Catena
Address Description Unit Type
1016 Total available AC output apparent power VA S32
1030 Total AC input true power W S32
1032 Total AC input apparent power VA S32
1034 Total DC input true power W S32
1080 Worse AC output load status U16
1081 Worse AC output hardware status (inverters) U16
1082 Reserved
1083 Reserved
1084 Worse AC input source status U16
1085 Worse AC input hardware status U16
1086 Worse DC input source status U16
1087 Worse DC input hardware status U16
1088 Redundancy lost U16
1089 On DC U16
1090 Reserved U16
1091 MBP engaged U16
1096 Number of events (all alarms types) U16
1097 Number of major alarms U16
1098 Number of minor alarms U16
Output phase 1
2050 Phase 1 true power W S32/float
2052 Phase 1 apparent power VA S32/float
2054 Phase 1 voltage V/10 S32/float
2056 Phase 1 current A/10 S32/float
2058 Phase 1 frequency Hz/100 S32/float
2060 Reserved
2062 Phase 1 worse power factor % S32/float
2064 Phase 1 worse temperature °C/10 S32/float
2066 Phase 1 load ratio (W) % S32/float
2068 Phase 1 load ratio (VA) % S32/float
2070 Phase 1 available true power W S32/float
2072 Phase 1 available apparent power VA S32/float
Output phase 2
2100 Phase 2 true power W S32/float
2102 Phase 2 apparent power VA S32/float
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