Cray CRAY-1 - Page 180

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Table 6-2 16-bit asynchronous input channel signal exchange
(OJ, DU, or DV modules)
CRAY-l
External
1. Activate channel (Set CL and CA).
2.
Data 2
63
_2
48
with Ready
3. Resume
4.
Data 2
47
_2
32
with Ready
5. Resume
6.
Data 2
31
_2
16
with Ready
7. Resume •
8. with Ready
9.
Write word to memory and advance current address.
lOa. Resume •
lOb. For DV only, if (CA) = (CL), go to 13.
11.
If more data, go to 2.
Disconnect
12.
13. Set interrupt and deactivate channel.
Parity Bits a through 3 - Parity Bits 0 through 3 are each assigned
to a
4-bit group of data bits. The parity bits are set or cleared to
give the
bit group odd parity. Bit assignments are as follows:
Parity Bit 0 Data Bits 20 - 2
3
Parity Bit 1
Parity Bit 2
Parity Bit 3
Data Bits 24 - 27
Data Bits 2
8
- 211
Data Bits 212 - 2
15
Parity bits are sent from the external device to the CRAY-l at the
same time as the data bits. They are held stable in the same way as
are the data
bits.
Ready - The Ready signal sent to the CRAY-l indicates that a parcel
of data
is being sent to the CRAY-l input channel and may be sampled.
The Ready signal is a pulse 50 + 10 nanoseconds wide (at 50% voltage
points). The leading edge of Ready at the CRAY-l begins the timing
for sampling the data
bits.
Resume - Resume is sent from the CRAY-l to the external device to show
that the parcel was received and that the CRAY-l is ready for the next
data transmission.
Resume is a pulse 50 ± 3 nanoseconds wide (at 50%
voltage points).
2240004
6-8
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