Cray CRAY-1 - Page 179

I
OUTPUT CHANNEL PROGRAMMING
To start an output operation, the CRAY-l program must:
1. Set the channel
limit address to the last word address + 1 (LWA+l)
2. Set the channel current address to the first word address (FWA).
Setting the current address causes the channel active flag to be set. The
channel reads the first word from memory addressed by the contents of the
channel
IS current address register. When the word is received from memory,
the channel advances the current address by one and starts the data transfer.
After each word is read from memory and the current address is advanced, a
limit test is made. The test compares the contents of the channel IS current
address register and the channel IS limit address register. If they are
equal, the
transfer is completed as soon as the present word is transferred.
Then, a disconnect pulse is sent to indicate the end of the transfer.
When the disconnect pulse is sent, the channel is deactivated and an I/O
interrupt request is generated by the channel.
Output channel error condition
The interrupt flag also sets if an error is detected. The only error that
an output channel detects is a resume pulse received when the channel is
not active.
16-BIT ASYNCHRONOUS CHANNELS
Input channels
Table 6-2
illustrates a general view of an input signal sequence.
Data Bits 2° throuoh 2
15
- Data Bits 2°,2
1
,
••• ,2
15
are signals
carrying a
16-bit parcel of data from the external device to the
CRAY-l. They must all be valid within 80 nanoseconds after the
leading
edge of the Ready signal. Data Bit signals must remain
unchanged on the lines until the corresponding resume is received
by the external device. Normally, data is sent coincident with
the
Ready pulse and is held until the subsequent Ready pulse.
2240004 6-7
E