Cray CRAY-1 - Page 188

I
Table 6-7. 16-bit synchronous output channel signal exchange
(SI module)
CRAY-l
Externa 1
1. Activate channel (set CL and CA).
2. Read word from memory and advance current address.
3.
Data 2
63
_2
48
with Ready ~
(With Disconnect if last word)
...
Data 2
47
_2
32
with Ready
Data 2
31
-2
16
wi th Ready -----l.~
Data 2
15
_2° with Ready ---~~~
If (CA) = (CL), go to 15.
}
Resume
150 nsec
pulse
4.
5.
6.
7.
8.
9.
10.
Read word from memory and advance current address.
Data 2
63
_2
48
with Ready •
(With Disconnect if (CA) = (CL))
11.
12. Data 2
31
_2
16
13. Data 2
15
_2°
14. If (CA) 1 (C L ), go to 9.
15. Set interrupt and deactivate channel.
200 nsec
pulse
Ready
Ready
give
the
bit group odd
parity.
Bit assignments
are as follows:
Pari ty
Bit
0
Data
Bi ts 20 - 2
3
Parity
Bit 1
Data Bits
24
- 27
Parity
Bit 2 Data
Bi ts 2
8
_
211
Parity
Bit 3 Data
Bits
212 _
2
15
Parity bits are sent from the CRAY-l to the external device at the
same time as the data bits. They are held stable in the same way
as are the data bits.
Channel Master Clear - The Channel Master Clear may be programmed
(see description of Programmed Master Clear later in this section)
or may be the result of a Clear I/O signal. The programmed Master
Clear to external is a static signal sent from the CRAY-l to an
external device. The Master Clear signal may be used by the external
device
for control purposes or it may be ignored.
2240004
6-16
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