I
Ready
-
The
Ready
signal
is
sent
from
the
CRAY-l
to the external
device to
indicate
that
the data
is
valid.
The
first
Ready
signal
is
a pulse
50
± 3 nanoseconds
wide
(at
the
50%
voltage
points).
Following the
first
ready,
which
awaits a
resume
response, the signal
is
sent
in
one
group of three readies followed
by
as
many
groups
of four readies
as
required to complete the block
transfer.
Resume
-
Resume
is
sent
from
the external device to the
CRAY-l
in
response to the
first
Ready
signal.
The
Resume
pulse
is
50
±
10
nanoseconds
wide
(at
the
50%
voltage
points).
Disconnect - Disconnect
is
a signal
sent
from
the
CRAY-l
to the
external device
indicating
that
the transmission
from
the
CRAY-l
is
complete.
It
is
sent with parcel 0 of the
last
64-bit
data
word.
Disconnect
is
a pulse
50
+ 3 nanoseconds
wide
(at
the
50%
voltage
points).
-
Block
length
restrictions
-
The
output channel
has
no
restrictions
on
block length.
The
mass
storage
controller,
which
is
the only
device connected to
this
type
of
channel,
has
rigid
restrictions
on
its
block lengths. Output transmissions are limited to 1 or
512
64-bit
words.
Cabling
restrictions
-
The
synchronous channels use a fixed length
cable providing a constant propagation time
for
the
signals.
This
cable delay
is
designed
into
the control
logic;
therefore,
the cable
length
and
propagation speed cannot
be
changed.
The
total
cable length
between
the
CRAY-l
and
the external device
is
17
feet
(518
cm).
The
cable
run
for
a synchronous channel uses
one
10
foot
(305
cm)
drop
cable
at
the
CRAY-l
and
one
7 foot
(213
cm)
length of data cable
at
the external device.
Clock
- A clock signal
is
supplied over a separate cable (one per
DCU
cabinet) to the external device
from
the
CRAY-l.
This clock
signal synchronizes
signals
at
the external device
interface
connector.
PROGRAMMED
MASTER
CLEAR
TO
EXTERNAL
The
CRAY-l
contains a
mechanism
for
sending a Master Clear signal to
an
external device.
Sequence for normal-speed channels
For
the normal-speed asynchronous channels
(OJ/OK,
OU/OK,
OV/OK),
delays
1
and
2 are device dependent.
For
eRr
interfaces,
they sould
be
at
least
1 microsecond.
2240004
6-17
E
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