Cray CRAY-1 - Page 193

I
I/O LOCKOUT
An I/O memory request can be locked out by a block transfer. Multiple
block
transfers cannot issue without allowing one waiting I/O reference to
complete.
The maximum duration of a lockout caused by block transfers is
one block length.
Exchange sequences and instruction fetch sequences can also cause lockouts.
MEMORY BANK CONFLICTS
Memory bank conflicts are tested for CPU scalar references and I/O memory
references. All other memory references (block transfers, exchange
sequences,
instruction fetch sequences) wait issue until all memory banks
are quiet. When a block transfer, exchange sequence, or instruction fetch
sequence
has issued, all other memory references are locked out.
Each memory bank can accept a new request every four clock periods. To
test for a memory bank conflict, the lower four bitst of the memory address
move through three l-clock-period registers. The first register is rank A,
the second is rank B, and the third is rank C. On the fourth clock, the
address
is placed in the memory address register.
I/O MEMORY CONFLICTS
Before coincidence can be tested, a check is made to insure that no block
transfer, exchange sequence, instruction fetch sequence, or scalar CP2 is
in progress. If so, the I/O request is blocked and must be resubmitted
~
eight clock periods later. The lower four bits' of an I/O re7erence are
tested against ranks A, B, and C. Coincidence with rank A, B, or C dis-
allows the I/O request. These ranks may be holding previous scalar or I/O
memory requests. An I/O request that is disallowed must wait eight clock
periods before
it can request again.
t Three
bits for 8-bank phasing; see description in section 5.
2240004
6-21
E