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Denon AVR-X1100W

Denon AVR-X1100W
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TOP258MG (SMPS : IC601)
Block diagram
Rev. F 01/09
6
TOP252-262
www.powerint.com
Pin Functional Description
DRAIN (D) Pin:
High-voltage power MOSFET DRAIN pin. The internal start-up
bias current is drawn from this pin through a switched high-
voltage current source. Internal current limit sense point for
drain current.
CONTROL (C) Pin:
Error ampli er and feedback current input pin for duty cycle
control. Internal shunt regulator connection to provide internal
bias current during normal operation. It is also used as the
connection point for the supply bypass and auto-restart/
compensation capacitor.
EXTERNAL CURRENT LIMIT (X) Pin (Y, M, E and L package):
Input pin for external current limit adjustment and remote
ON/OFF. A connection to SOURCE pin disables all functions
on this pin.
Figure 4. Pin Confi guration (Top View).
X
PI-4711-021308
DC
Input
Voltage
+
-
D
S
C
CONTROL
V
R
IL
R
LS
12 k7
4 M7
V
UV
= I
UV
× R
LS
+V
V
(I
V
= I
UV
)
V
OV
=I
OV
×R
LS
+V
V
(I
V
= I
OV
)
For R
LS
=4M7
DC
MAX
@100 VDC = 76%
DC
MAX
@375 VDC = 41%
For R
IL
= 12 k7
I
LIMIT
= 61%
See Figure 55b for
other resistor values
(R
IL
) to select different
I
LIMIT
values.
V
UV
= 102.8 VDC
V
OV
= 451 VDC
Figure 5. TOP254-258 Y and All M/E/L Package Line Sense and Externally Set
Current Limit.
PI-4712-120307
DC
Input
Voltage
+
-
DM
S
C
V
UV
= I
UV
× R
LS
+V
M
(I
M
= I
UV
)
V
OV
=I
OV
×R
LS
+V
M
(I
M
= I
OV
)
For R
LS
= 4 M7
V
UV
= 102.8 VDC
V
OV
= 451 VDC
DC
MAX
@100 VDC = 76%
DC
MAX
@375 VDC = 41%
CONTROL
R
LS
4 M7
Figure 7. P/G Package Line Sense.
XG
PI-4983-021308
DC
Input
Voltage
+
-
D
S
C
CONTROL
V
R
IL
R
LS
12 k7
4 M7
V
UV
= I
UV
× R
LS
+V
V
(I
V
= I
UV
)
V
OV
=I
OV
×R
LS
+V
V
(I
V
= I
OV
)
For R
LS
=4M7
DC
MAX
@100 VDC = 76%
DC
MAX
@375 VDC = 41%
For R
IL
= 12 k7
I
LIMIT
= 61%
See Figure 55b for
other resistor values
(R
IL
) to select different
I
LIMIT
values.
V
UV
= 102.8 VDC
V
OV
= 451 VDC
Figure 6. TOP259-261 Y Package Line Sense and External Current Limit.
VOLTAGE MONITOR (V) Pin (Y & M package only):
Input for OV, UV, line feed forward with DC
MAX
reduction, output
overvoltage protection (OVP), remote ON/OFF and device reset.
A connection to the SOURCE pin disables all functions on this pin.
MULTI-FUNCTION (M) Pin (P & G packages only):
This pin combines the functions of the VOLTAGE MONITOR (V)
and EXTERNAL CURRENT LIMIT (X) pins of the Y package into
one pin. Input pin for OV, UV, line feed forward with DC
MAX
PI-4644-091108
Tab Internally
Connected to
SOURCE Pin
Tab Internally
Connected to
SOURCE Pin
Lead Bend
Outward from Drawing
(Refer to eSIP-7F Package
Outline Drawing)
Exposed Pad
(Hidden)
Internally
Connected to
SOURCE Pin
Y Package (TO-220-7C)
D
C
S
S
S
S
S
S
S
S
S
7
D
5
F
4
S
3
C
2
X
1
V
7
D
5
S
4
F
3
C
2
X
1
V
7
D
5
S
4
F
3
C
2
X
1
V
7
D
5
G
4
S
3
C
2
X
1
V
M
P and G Package
M Package
8
5
7
1
4
2
6
D
X
C
V
10
6
9
1
5
8
7
2
3
Note: Y package for TOP259-261
Note: Y package for TOP254-258
E Package (eSIP-7C)
L Package (eSIP-7F)
Y Package (TO-220-7C)
Rev. F 01/09
4
TOP252-262
www.powerint.com
Figure 3a. Functional Block Diagram (P and G Packages).
Figure 3b. Functional Block Diagram (M Package).
PI-4643-082907
SHUTDOWN/
AUTO-RESTART
CLOCK
CONTROLLED
TURN-ON
GATE DRIVER
CURRENT LIMIT
COMPARATOR
INTERNAL UV
COMPARATOR
INTERNAL
SUPPLY
5.8 V
4.8 V
SOURCE (S)
SOURCE (S)
S
R
Q
D
MAX
STOP
SOFT
START
CONTROL (C)
VOLTAGE
MONITOR (V)
-
+
5.8 V
I
FB
1 V
Z
C
V
C
+
-
+
-
+
-
LEADING
EDGE
BLANKING
÷ 16
1
HYSTERETIC
THERMAL
SHUTDOWN
SHUNT REGULATOR/
ERROR AMPLIFIER
+
-
DRAIN (D)
ON/OFF
DC
MAX
DC
MAX
0
OV/
UV
OVP V
V
I (LIMIT)
CURRENT
LIMIT
ADJUST
V
BG
+ V
T
LINE
SENSE
SOFT START
OFF
F REDUCTION
F REDUCTION
STOP LOGIC
EXTERNAL
CURRENT
LIMIT (X)
OSCILLATOR
WITH JITTER
PWM
K
PS(UPPER)
K
PS(LOWER)
SOFT START
I
FB
I
PS(UPPER)
I
PS(LOWER)
K
PS(UPPER)
K
PS(LOWER)
PI-4508-120307
SHUTDOWN/
AUTO-RESTART
CLOCK
CONTROLLED
TURN-ON
GATE DRIVER
CURRENT LIMIT
COMPARATOR
INTERNAL UV
COMPARATOR
INTERNAL
SUPPLY
5.8 V
4.8 V
K
PS(UPPER)
K
PS(LOWER)
SOURCE (S)
SOURCE (S)
S
R
Q
D
MAX
STOP
SOFT
START
CONTROL (C)
MULTI-
FUNCTION (M)
-
+
5.8 V
I
FB
Z
C
V
C
+
-
+
-
+
-
LEADING
EDGE
BLANKING
÷ 16
1
HYSTERETIC
THERMAL
SHUTDOWN
SHUNT REGULATOR/
ERROR AMPLIFIER
+
-
DRAIN (D)
ON/OFF
DC
MAX
DC
MAX
0
OV/
UV
OVP V
V
I (LIMIT)
CURRENT
LIMIT
ADJUST
V
BG
+ V
T
LINE
SENSE
SOFT START
SOFT START
I
FB
I
PS(UPPER)
I
PS(LOWER)
K
PS(UPPER)
K
PS(LOWER)
OFF
F REDUCTION
F REDUCTION
STOP LOGIC
OSCILLATOR
WITH JITTER
PWM
147

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