Eaton EDR-5000 - Page 661

EDR-5000 IM02602007E
Name Description
Logic.LE60.Timer Out Signal: Timer Output
Logic.LE60.Out Signal: Latched Output (Q)
Logic.LE60.Out inverted Signal: Negated Latched Output (Q NOT)
Logic.LE61.Gate Out Signal: Output of the logic gate
Logic.LE61.Timer Out Signal: Timer Output
Logic.LE61.Out Signal: Latched Output (Q)
Logic.LE61.Out inverted Signal: Negated Latched Output (Q NOT)
Logic.LE62.Gate Out Signal: Output of the logic gate
Logic.LE62.Timer Out Signal: Timer Output
Logic.LE62.Out Signal: Latched Output (Q)
Logic.LE62.Out inverted Signal: Negated Latched Output (Q NOT)
Logic.LE63.Gate Out Signal: Output of the logic gate
Logic.LE63.Timer Out Signal: Timer Output
Logic.LE63.Out Signal: Latched Output (Q)
Logic.LE63.Out inverted Signal: Negated Latched Output (Q NOT)
Logic.LE64.Gate Out Signal: Output of the logic gate
Logic.LE64.Timer Out Signal: Timer Output
Logic.LE64.Out Signal: Latched Output (Q)
Logic.LE64.Out inverted Signal: Negated Latched Output (Q NOT)
Logic.LE65.Gate Out Signal: Output of the logic gate
Logic.LE65.Timer Out Signal: Timer Output
Logic.LE65.Out Signal: Latched Output (Q)
Logic.LE65.Out inverted Signal: Negated Latched Output (Q NOT)
Logic.LE66.Gate Out Signal: Output of the logic gate
Logic.LE66.Timer Out Signal: Timer Output
Logic.LE66.Out Signal: Latched Output (Q)
Logic.LE66.Out inverted Signal: Negated Latched Output (Q NOT)
Logic.LE67.Gate Out Signal: Output of the logic gate
Logic.LE67.Timer Out Signal: Timer Output
Logic.LE67.Out Signal: Latched Output (Q)
Logic.LE67.Out inverted Signal: Negated Latched Output (Q NOT)
Logic.LE68.Gate Out Signal: Output of the logic gate
Logic.LE68.Timer Out Signal: Timer Output
Logic.LE68.Out Signal: Latched Output (Q)
Logic.LE68.Out inverted Signal: Negated Latched Output (Q NOT)
Logic.LE69.Gate Out Signal: Output of the logic gate
Logic.LE69.Timer Out Signal: Timer Output
www.eaton.com 661