GigaDevice Semiconductor GD-Link V2 - GD-Link V2 Hardware Overview; Pin Definitions and Wiring Methods

GD-Link V2 Adapter User Guide
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2. Hardware introduction
2.1. Pin definitions and wiring methods
To enable programming, debugging, serial communication, and printing functions, connect
the GD-Link V2 pins to the SWD (SWO), JTAG, or USART interface of the target chip using
DuPont wires or ribbon cables. The pinout of GD-Link V2 is illustrated in Figure 2-1. GD-Link
V2 pinout diagram.
Figure 2-1. GD-Link V2 pinout diagram
The functions of each GD-Link V2 pin are described as shown in Table 2-1. GD-Link V2 pin
function definitions.
Table 2-1. GD-Link V2 pin function definitions
Pin Number
Pin Name
Description
1
T_Vref
Target chip power supply, providing 3.3V / 5V
2
T_TMS/IO
JTAG TMS pin / SWD SWDIO pin
3
GND
Power ground
4
T_TCK/CLK
JTAG TCK pin / SWD CLK pin
5
USART1_TX
Serial transmission pin
6
T_TDO
JTAG TDO pin / SWO pin
7
USART1_RX
Serial reception pin
8
T_TDI
JTAG TDI pin
9
GND
Power ground
10
T_Reset
JTAG / SWD target chip reset pin
The diagram of GD-Link V2 hardware connection to the target chip is illustrated in Figure 2-2.
SWD interface connection diagram, Figure 2-3. JTAG interface connection diagram,
Figure 2-4. SWD + SWO interface connection diagram and Figure 2-5. Serial interface
connection diagram.