iCLASS SE Reader Module Hardware Developer’s Guide, SE3200-902, Rev. C.1
Page 17 of 52 February 2014
3.3 Pin Configuration
3.3.1 P301 Host Interface Connector
This connector is compatible with P1 of the OEM75 module.
Table 2: P301 Pin Configuration
1 +3.3 VDC Output 0.1W maximum power sourced output
2 GND Reference Logic level reference
3 SPI_CLK Input SPI clock signal
4 SPI_nCS Input SPI chip select (active low)
5 SPI_MOSI Input SPI data in
6 SPI_MISO Output SPI data out
7 URX Input UART data in
8 UTX Output UART data out
3.3.2 P701 Power and I/O Connector
This connector is compatible with P2 of the OEM75 module.
Table 3: P701 Pin Configuration
1 VIN Supply Supply Voltage Positive
2 VRTN Supply Supply Voltage Negative
3 nReset Input Reset (active low)
4 nHold Input
Signal that holds off the presentation of the
card data. When asserted, this line either
buffers a card or disables a card read until
released, as configured (active low)
5 nGLED_CPRES Output
The signal on this pin reflects the recognition
of a card near the antenna. The autonomous
read and buffered data from the credential is
output on the configured host interface.
6 WG_DATA0 Output Wiegand Data 0
7 WG_DATA1 Output Wiegand Data 1
8 nBEEPER Output Signal which enables off board signaling
9 nRLED Output
Signal which can be used to enable an off
board LED
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