Rev. 1.50 142 August 28, 2017 Rev. 1.50 143 August 28, 2017
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
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C Bus Data and Acknowledge Signal
Thetransmitteddatais8-bitswideandistransmittedaftertheslavedevicehasacknowledged
receiptofitsslaveaddress.TheorderofserialbittransmissionistheMSBrstandtheLSBlast.
Afterreceiptof8-bitsofdata,thereceivermusttransmitanacknowledgesignal,level“0”,before
itcanreceivethenextdatabyte.Iftheslavetransmitterdoesnotreceiveanacknowledgebitsignal
fromthemasterreceiver,thentheslavetransmitterwillreleasetheSDAlinetoallowthemaster
tosendaSTOPsignaltoreleasetheI
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CBus.ThecorrespondingdatawillbestoredintheSIMD
register.Ifsetupasatransmitter,theslavedevicemustrstwritethedatatobetransmittedintothe
SIMDregister.Ifsetupasareceiver,theslavedevicemustreadthetransmitteddatafromtheSIMD
register.
Whentheslavereceiverreceivesthedatabyte,itmustgenerateanacknowledgebit,knownas
TXAK,onthe9thclock.Theslavedevice,whichissetupasatransmitterwillchecktheRXAKbit
intheSIMC1registertodetermineifitistosendanotherdatabyte,ifnotthenitwillreleasethe
SDAlineandawaitthereceiptofaSTOPsignalfromthemaster.
Note:*Whenaslaveaddressismatched,thedevicesmustbeplacedineitherthetransmitmode
andthenwritedatatotheSIMDregister,orinthereceivemodewhereitmustimplementa
dummyreadfromtheSIMDregistertoreleasetheSCLline.
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C Communication Timing Diagram