IFM VNB211 - 13�3 Switching Delay for the Lower Limit Monitor

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13.3 Switching delay for the lower limit monitor
The time diagram shows the effect of the switching delay on the analogue input for
a lower limit monitor (ESP1 > ESP2)� The outputs are set as normally closed (OU1
and OU2 → NC).
t [s]
10
20
Analogue In
[°C]
Eh1
{
Eh2{
t [s]
10
20
OU 1 (n.c.)
ds1, ds2, dr1, dr2 = 0 s
24 V
0 V
on
off
off
on
t [s]
10
20
OU 2 (n.c.)
24 V
0 V
on
off
off
on
t [s]
10
20
OU 1 (n.c.)
ds1, ds2 = 2 s / dr1, dr2 = 3 s
24 V
0 V
on
off
2 s
3 s
t [s]
10
20
OU 2 (n.c.)
ds1, ds2 = 2 s / dr1, dr2 = 3 s
24 V
0 V
off
2 s
3 s
1
on
2 s
off
3 s
ESP2
ESP1
1: Not switched on because the selected switching delay is too short�