Infineon TRAVEO T2G family CYT4D Series - 5.9.2 Sample code for initial configuration of PCLK settings (example of the TCPWM timer)

Application Note 55 of 80 002-26071 Rev. *B
2021-09-07
Clock configuration setup in TRAVEO™ T2G family CYT4D series MCUs
Configuring the internal clock
Parameters
Description
Value
targetFreq
Target clock frequency
2000000ul (2 MHz)
divNum
Divide number
periFreq/targetFreq
Table 18 List of PCLK (Example of the TCPWM timer) settings functions
Functions
Description
Value
Cy_SysClk_PeriphAssign
Divider(IPblock,
dividerType, dividerNum)
Assign a programmable
divider to a selected IP block
(such as a TCPWM)
IPblock =
PCLK_TCPWMx_CLOCKSx_COUNTER
dividerType = CY_SYSCLK_DIV_16_BIT
dividerNum =
TCPWM_PERI_CLK_DIVIDER_NO_COUNTER
Cy_SysClk_PeriphSet
Divider(dividerType,
dividerNum, dividerValue)
Set the peripheral divider
dividerType, = CY_SYSCLK_DIV_16_BIT
dividerNum =
TCPWM_PERI_CLK_DIVIDER_NO_COUNTER
dividerValue = divNum-1ul
Cy_SysClk_PeriphEnable
Divider(dividerType,
dividerNum)
Enable the peripheral
divider
dividerType, = CY_SYSCLK_DIV_16_BIT
dividerNum =
TCPWM_PERI_CLK_DIVIDER_NO_COUNTER
5.9.2 Sample code for the initial configuration of PCLK settings (example of
the TCPWM timer)
Code Listing 40 to Code Listing 43 show the sample code.
Code Listing 40 General configuration of PCLK (example of the TCPWM timer) settings
:
#define PCLK_TCPWMx_CLOCKSx_COUNTER PCLK_TCPWM0_CLOCKS0
#define TCPWM_PERI_CLK_DIVIDER_NO_COUNTER 0u
:
int main(void)
{
SystemInit();
__enable_irq(); /* Enable global interrupts. */
uint32_t periFreq = 80000000ul;
uint32_t targetFreq = 2000000ul;
uint32_t divNum = (periFreq / targetFreq);
CY_ASSERT((periFreq % targetFreq) == 0ul); // inaccurate target clock
Cy_SysClk_PeriphAssignDivider(PCLK_TCPWMx_CLOCKSx_COUNTER, CY_SYSCLK_DIV_16_BIT,
TCPWM_PERI_CLK_DIVIDER_NO_COUNTER);
/* Sets the 16-bit divider */
Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_16_BIT, TCPWM_PERI_CLK_DIVIDER_NO_COUNTER, (divNum-1ul));
Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_16_BIT, TCPWM_PERI_CLK_DIVIDER_NO_COUNTER);
for(;;);
}
Peripheral divider setting. See Code
Listing 42.
Peripheral divider enable setting. See
Code Listing 43.
Peripheral divider assign setting. See
Code Listing 41.
Define PCLK_TCPWMx_CLOCKSx_COUNTER,
Define TCPWM_PERI_CLK_DIVIDER_NO_COUNTER.
(1) Set the input/output frequency and divide number.
Calculation of division