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Infineon TRAVEO T2G family CYT4D Series - 6.3 CSV diagram and relationship of the monitored clock and reference clocks

Infineon TRAVEO T2G family CYT4D Series
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Application Note 73 of 80 002-26071 Rev. *B
2021-09-07
Clock configuration setup in TRAVEO™ T2G family CYT4D series MCUs
Supplementary information
6.3 CSV diagram and relationship of the monitored clock and reference
clocks
Figure 25 shows the clock diagram with the monitored clock and reference clock of CSV. Table 35 shows the
relationship between the monitored clock and reference clock.
IMO
EXT_CLK
Predivider
(1/2/4/8)
CSV_HF0
CLK_PATH0
FLL
CLK_PATH1
PLL400
#0
CLK_PATH2
PLL400
#1
CLK_PATH3
PLL400
#2
CLK_PATH8
PLL200
#2
Predivider
(1/2/4/8)
CSV_HF1
Predivider
(1/2/4/8)
CSV_HF2
Predivider
(1/2/4/8)
CSV_HF3
Predivider
(1/2/4/8)
CSV_HF4
Predivider
(1/2/4/8)
CSV_HF5
Predivider
(1/2/4/8)
CSV_HF6
Predivider
(1/2/4/8)
CSV_HF7
CLK_PATH9
ECO
Prescaler
ECO
ILO0
ILO1
WCO
CSV_REF
CLK_REF_HF
CSV_ILO
CSV_LF
CLK_LF
Active Domain
DeepSleep Domain
Hibernate domain
REF_MUX
PATH_MUX9
DSI_MUX9
ROOT_MUX4
ROOT_MUX5
ROOT_MUX6
ROOT_MUX7
ROOT_MUX3
ROOT_MUX2
ROOT_MUX1
ROOT_MUX0
PATH_MUX8
DSI_MUX8
BYPASS_MUX8
PATH_MUX3
DSI_MUX3
BYPASS_MUX3
PATH_MUX2
DSI_MUX2
BYPASS_MUX2
PATH_MUX1
DSI_MUX1
BYPASS_MUX1
PATH_MUX0
DSI_MUX0
BYPASS_MUX0
LFCLK_SEL
CLK_SEL
CLK_ILO0
CLK_BAK
CLK_HF0
CLK_HF1
CLK_HF2
CLK_HF3
CLK_HF4
CLK_HF5
CLK_HF6
CLK_HF7
LPECO
LPECO
Prescaler
CSV
Reset /
Fault reporting
LEGEND 1:
Relationship of monitored clock and reference clock
Reference clock
Active domain
Monitored clock
CSV
Wakeup
Fault reporting
Reference clock
DeepSleep domain
Monitored clock
Predivider
(1/2/4/8)
CSV_HF9
Predivider
(1/2/4/8)
CSV_HF10
Predivider
(1/2/4/8)
CSV_HF11
Predivider
(1/2/4/8)
CSV_HF12
Predivider
(1/2/4/8)
CSV_HF13
Predivider
(1/2/4/8)
CSV_HF14
ROOT_MUX10
ROOT_MUX11
ROOT_MUX12
ROOT_MUX13
ROOT_MUX9
ROOT_MUX8
CLK_HF8
CLK_HF9
CLK_HF10
CLK_HF11
CLK_HF12
CLK_HF13
CLK_PATH4
PLL400
#3
CLK_PATH5
PLL400
#4
PATH_MUX5
DSI_MUX5
BYPASS_MUX5
PATH_MUX4
DSI_MUX4
BYPASS_MUX4
CLK_PATH6
PLL200
#0
CLK_PATH7
PLL200
#1
PATH_MUX7
DSI_MUX7
BYPASS_MUX7
PATH_MUX6
DSI_MUX6
BYPASS_MUX6
Figure 25 CSV diagram