5 Configuring the internal clock
This section describes how to configure the internal clocks as part of the clock system.
5.1 Configuring CLK_PATHx
The CLK_PATHx is used as the input source for the root clock, CLK_HFx. The CLK_PATHx can select all clock
resources including the FLL and PLL using DSI_MUX and PATH_MUX. The CLK_PATH9 cannot select the FLL and
PLL, but other clock resources can be selected.
Table 13 shows the relationship between the FLL/PLLs and CLK_PATHx.
Table 13 Relationship between the FLL/PLLs and PATHx
Figure 14 shows a generation diagram for CLK_PATH.
Figure 14 Generation diagram for the CLK_PATH
To configure the CLK_PATHx, you must configure the DSI_MUX and PATH_MUX. The BYPASS_MUX is also
required for the CLK_PATHx. Table 14 shows the registers required for configuring the CLK_PATHx. See the
architecture TRM for details.
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