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Infineon TRAVEO T2G family CYT4D Series User Manual

Infineon TRAVEO T2G family CYT4D Series
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Application Note Please read the Important Notice and Warnings at the end of this document 002-26071 Rev. *B
www.infineon.com page 1 of 80 2021-09-07
AN226071
Clock configuration setup in TRAVEO T2G
family CYT4D series MCUs
About this document
Scope and purpose
AN226071 describes how to set up the various clock sources in TRAVEO™ T2G family CYT4D series MCUs and
provides examples including configuring PLL/FLL and calibrating the ILO.
Associated part family
TRAVEO™ T2G family CYT4D series automotive microcontrollers
Intended audience
This document is intended for users who use the clock configuration setup in TRAVEO™ T2G family CYT4D series
MCUs.
Table of contents
About this document ......................................................................................................................... 1
Table of contents .............................................................................................................................. 1
1 Introduction ............................................................................................................................ 3
2 Clock system for TRAVEO™ T2G family MCUs ............................................................................... 4
2.1 Overview of the clock system ................................................................................................................. 4
2.2 Clock resources ....................................................................................................................................... 4
2.3 Clock system functions ........................................................................................................................... 4
2.4 Basic clock system settings ................................................................................................................... 11
3 Configuration of the clock resources .........................................................................................12
3.1 Setting the ECO ..................................................................................................................................... 12
3.1.1 Use case ............................................................................................................................................ 13
3.1.2 Configuration ................................................................................................................................... 13
3.1.3 Sample code for initial ECO configuration ...................................................................................... 14
3.2 Setting WCO ........................................................................................................................................... 20
3.2.1 Operation overview .......................................................................................................................... 20
3.2.2 Configuration ................................................................................................................................... 20
3.2.3 Sample code for the initial configuration of WCO settings ............................................................ 21
3.3 Configuring IMO ..................................................................................................................................... 22
3.4 Configuring ILO0/ILO1 ........................................................................................................................... 22
3.5 Setting the LPECO ................................................................................................................................. 23
3.5.1 Use case ............................................................................................................................................ 23
3.5.2 Sample code for the initial configuration of LPECO settings ......................................................... 24
4 Configuration of the FLL and PLL ..............................................................................................26
4.1 Setting FLL ............................................................................................................................................. 26
4.1.1 Operation overview .......................................................................................................................... 26
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Infineon TRAVEO T2G family CYT4D Series Specifications

General IconGeneral
Clock Sourceinternal oscillator
PLLsMultiple PLLs for clock generation and multiplication
External Clock InputYes
Internal RC OscillatorYes
Watchdog Timer ClockDedicated clock sources with independent operation
Clock MonitoringYes

Summary

About this document

Scope and purpose

Explains the document's objective and content, including clock configuration setup.

Associated part family

Identifies the specific part family (TRAVEO™ T2G CYT4D series MCUs) covered.

Intended audience

Specifies the target users for this application note.

1 Introduction

2 Clock system for TRAVEO™ T2G family MCUs

2.1 Overview of the clock system

Provides a high-level overview of the clock system structure and its components.

2.2 Clock resources

Describes the available internal and external clock sources for the MCUs.

2.3 Clock system functions

Explains the functions of the clock selection and multiplier block.

2.4 Basic clock system settings

Explains how to configure the clock system using the sample driver library (SDL).

3 Configuration of the clock resources

3.1 Setting the ECO

Details how to enable and configure the External Crystal Oscillator (ECO).

3.1.1 Use case

Provides a specific use case for configuring the ECO with a crystal unit.

3.1.2 Configuration

Lists parameters and functions for ECO trim settings in the SDL.

3.1.3 Sample code for initial ECO configuration

Provides sample code and register notation for initial ECO configuration.

3.2 Setting WCO

Explains how to configure and enable the Watch Crystal Oscillator (WCO).

3.2.1 Operation overview

Describes the basic operation and enabling process for WCO.

3.2.2 Configuration

Lists parameters and functions for WCO settings in the SDL.

3.2.3 Sample code for initial configuration of WCO settings

Provides sample code for initial WCO configuration.

3.3 Configuring IMO

Describes the Internal Main Oscillator (IMO) configuration.

3.4 Configuring ILO0/ILO1

Explains how to configure the Internal Low-Speed Oscillators (ILO0/ILO1).

3.5 Setting the LPECO

Details the configuration and enabling of the Low-Power External Crystal Oscillator (LPECO).

3.5.1 Use case

Provides a specific use case for configuring the LPECO with a crystal unit.

3.5.2 Sample code for initial configuration of LPECO settings

Provides sample code for initial LPECO configuration.

4 Configuration of the FLL and PLL

4.1 Setting FLL

Explains how to configure the Frequency-Locked Loop (FLL).

4.1.1 Operation overview

Describes the procedure for setting up the FLL.

4.1.2 Use case

Provides a use case for FLL configuration (16 MHz input to 100 MHz output).

4.1.3 Configuration

Lists parameters and functions for FLL settings in the SDL.

4.1.4 Sample code for initial configuration of FLL settings

Provides sample code for initial FLL configuration.

4.2 Setting PLL

Explains how to configure Phase-Locked Loops (PLL400 and PLL200).

4.2.1 Use case

Details use cases for PLL configuration, including frequencies and features.

4.2.2 Configuration

Lists parameters for PLL 400 settings in the SDL.

4.2.3 Sample code for initial PLL configuration

Provides sample code for initial PLL configuration.

5 Configuring the internal clock

5.1 Configuring CLK_PATHx

Details how to configure CLK_PATHx using DSI_MUX and PATH_MUX.

5.2 Configuring CLK_HFx

Explains how to select and configure the high-frequency clocks (CLK_HFx).

5.3 Configuring the CLK_LF

Describes how to configure the Low-Frequency clock (CLK_LF).

5.4 Configuring CLK_FAST_0/CLK_FAST_1

Explains configuration of fast clocks CLK_FAST_0 and CLK_FAST_1.

5.5 Configuring CLK_MEM

Details configuration of memory clock CLK_MEM.

5.6 Configuring CLK_PERI

Describes configuration of peripheral clock CLK_PERI.

5.7 Configuring CLK_SLOW

Explains configuration of slow clock CLK_SLOW.

5.8 Configuring CLK_GR

Details configuration of group clocks CLK_GR.

5.9 Configuring PCLK

Covers configuration of peripheral clocks (PCLK).

5.9.1 Example of PCLK setting

Provides an example of PCLK configuration for a specific peripheral.

5.9.1.1 Use case

Details a use case for PCLK configuration with specific clock frequencies.

5.9.1.2 Configuration

Lists parameters for PCLK configuration (TCPWM timer example).

5.9.2 Sample code for initial configuration of PCLK settings (example of the TCPWM timer)

Provides sample code for initial PCLK configuration for TCPWM timer.

5.10 Setting ECO_Prescaler

Explains how to set up the ECO prescaler for CLK_LF.

5.10.1 Use case

Provides a use case for ECO prescaler configuration.

5.10.2 Configuration

Lists parameters and functions for ECO prescaler settings in the SDL.

5.10.3 Sample code for initial configuration of ECO prescaler settings

Provides sample code for initial ECO prescaler configuration.

5.11 Configuring the LPECO_Prescaler

Explains how to configure the LPECO prescaler.

5.11.1 Use case

Provides a use case for LPECO prescaler configuration.

5.11.2 Configuration

Lists parameters and functions for LPECO prescaler settings in the SDL.

5.11.3 Sample code for initial configuration of LPECO prescaler settings

Provides sample code for initial LPECO prescaler configuration.

6 Supplementary information

6.1 Input clocks in peripheral functions

Lists the clock inputs for various peripheral functions.

6.2 Use case of the clock calibration counter function

Explains how to use the clock calibration counter to compare clock frequencies.

6.2.1.1 Configuration

Lists parameters for clock calibration counter configuration with ILO0 and ECO.

6.2.1.2 Configuration

Lists functions for clock calibration counter configuration with ILO0 and ECO.

6.2.1.3 Sample code for the initial configuration of the clock calibration counter with ILO0 and ECO settings

Provides sample code for initial clock calibration counter configuration.

6.2.2 ILO0 calibration using the clock calibration counter function

Details ILO0 calibration using the clock calibration counter.

6.2.2.1 Configuration

Lists parameters for ILO0 calibration using clock calibration counter.

6.3 CSV diagram and relationship of the monitored clock and reference clocks

Shows the CSV diagram and relationships between monitored and reference clocks.

7 Glossary

References

Other references

Revision history