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Infineon TRAVEO T2G family CYT4D Series - 1 Introduction

Infineon TRAVEO T2G family CYT4D Series
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Application Note 3 of 80 002-26071 Rev. *B
2021-09-07
Clock configuration setup in TRAVEO™ T2G family CYT4D series MCUs
Introduction
1 Introduction
TRAVEO™ T2G family MCUs, targeted at automotive systems such as instrument clusters and head-up display
(HUD), have a 2D graphics engine, sound processing, 32-bit automotive microcontrollers based on the Arm®
Cortex®-M7 processor with FPU (single and dual precision), and manufactured on an advanced 40-nm process
technology. These products enable a secure computing platform, and incorporate Infineon low-power flash
memory along with multiple high-performance analog and digital functions.
The TRAVEO™ T2G clock system supports high-, and low-speed clocks using both internal and external clock
sources. One of the typical use case for clock input is internal real-time clock (RTC). The TRAVEO™ T2G MCU
supports phase-locked loop (PLL) and frequency-locked loop (FLL) to generate clocks that operate the internal
circuit at a high speed.
The TRAVEO™ T2G MCU also supports the function to monitor clock operation and to measure the clock
difference of each clock with reference to a known clock.
To know more on the functionality described and terminology used in this application note, see the Clocking
system chapter in the architecture technical reference manual (TRM).
In this document, TRAVEO™ T2G family MCUs refer to CYT4D series.