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Intel Agilex User Guide
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Figure 1.
Fixed-Point Arithmetic 9 x 9 Mode
Input Register Bank
LO
ADCONST
ACCUMULA
TE
ay[8..0]
ax[8..0]
by[8..0]
bx[8..0]
+
+
1st Multiplier
Chainout adder
+
Output Register Bank
Double
Accumulation
Register
chainin[63..0]
chainout[63..0]
resulta[36:0]
3rd Multiplier
x
CLK
ENA[2..0]
CLR[1..0]
*1st Pipleine Register
*2nd Pipleine Register
*This block diagram shows the functional represen
tation of the DSP block. The pipeline registers are embedded within the v
arious circuits of the DSP block.
1
0
DISABLE_CHAINOUT
64’b0
Constant
x
x
x
cy[8..0]
cx[8..0]
dy[8..0]
dx[8..0]
+
2nd Multiplier
4th Multiplier
1st Adder
2nd Adder
Adder
2. Intel Agilex Variable Precision DSP Blocks Architecture
UG-20213 | 2019.04.02
Intel
®
Agilex
™
V
ariable Precision DSP Blocks User Guide
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10
9
11
Table of Contents
Default Chapter
2
Table of Contents
2
1 Intel ® Agilex ™ Variable Precision DSP Blocks Overview
4
Features
4
Supported Operational Modes in Intel Agilex Devices
5
Fixed-Point Arithmetic
5
Floating-Point Arithmetic
7
2 Intel Agilex Variable Precision DSP Blocks Architecture
9
Fixed-Point Arithmetic
12
Input Register Bank for Fixed-Point Arithmetic
12
Pipeline Registers for Fixed-Point Arithmetic
16
Pre-Adder for Fixed-Point Arithmetic
17
Internal Coefficient for Fixed-Point Arithmetic
17
Multipliers for Fixed-Point Arithmetic
17
Adder or Subtractor for Fixed-Point Arithmetic
17
Accumulator, Chainout Adder, and Preload Constant for Fixed-Point Arithmetic
18
Systolic Register for Fixed-Point Arithmetic
19
Double Accumulation Register for Fixed-Point Arithmetic
19
Output Register Bank for Fixed-Point Arithmetic
20
Floating-Point Arithmetic
20
Input Register Bank for Floating-Point Arithmetic
20
Pipeline Registers for Floating-Point Arithmetic
22
Multipliers for Floating-Point Arithmetic
23
Adder or Subtractor for Floating-Point Arithmetic
24
Output Register Bank for Floating-Point Arithmetic
24
Exception Handling for Floating-Point Arithmetic
25
3 Intel Agilex Variable Precision DSP Blocks Operational Modes
32
Operational Modes for Fixed-Point Arithmetic
32
Independent Multiplier Mode
32
X 8 (Unsigned) or 9 X 9 (Signed) Sum of 4 Mode
34
Multiplier Adder Sum Mode
34
Independent Complex Multiplier
35
Systolic FIR Mode
37
Operational Modes for Floating-Point Arithmetic
40
FP32 Single-Precision Floating-Point Arithmetic Functions
40
FP16 Half-Precision Floating-Point Arithmetic Functions
44
Multiple Floating-Point Variable DSP Blocks Functions
55
4 Intel Agilex Variable Precision DSP Blocks Design Considerations
62
Fixed-Point Arithmetic
62
Configurations for Input, Pipeline, and Output Registers
62
Internal Coefficient and Pre-Adder for Fixed-Point Arithmetic
64
Accumulator for Fixed-Point Arithmetic
64
Input Cascade for Fixed-Point Arithmetic
64
Chainout Adder
67
Floating-Point Arithmetic
67
Configurations for Input, Pipeline, and Output Registers
67
Chainout Adder
72
Guide
73
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Intel Agilex Specifications
General
Brand
Intel
Model
Agilex
Category
Microcontrollers
Language
English
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