Intel altera Cyclone V SoC - Table of Contents

Contents
1. Overview........................................................................................................................ 4
1.1. Block Diagram.......................................................................................................6
1.2. Feature Summary..................................................................................................7
1.3. Box Contents........................................................................................................ 9
2. Getting Started............................................................................................................. 10
2.1. Before You Begin................................................................................................. 10
2.2. Inspecting the Boards...........................................................................................10
2.3. Software and Driver Installation.............................................................................10
2.3.1. Installing the Quartus Prime Standard Edition Software.................................11
2.3.2. Installing the Intel SoC EDS...................................................................... 11
2.3.3. Installing the Development Kit...................................................................12
2.3.4. Installing the Intel FPGA Download Cable II Driver....................................... 12
3. Development Kit Setup................................................................................................. 14
3.1. Setting Up the Development Kit............................................................................. 14
3.2. Factory Default Switch and Jumper Settings............................................................ 15
3.2.1. Restoring the Default Settings for Power Solution 2 Board............................. 15
3.2.2. Restoring the Default Settings for Power Solution 1 Board............................. 19
3.3. Restoring the MAX V CPLD to the Factory Setting..................................................... 22
3.4. Restoring CFI Flash Device to the Factory Defaults................................................... 22
4. Board Update Portal......................................................................................................24
4.1. Connecting to the Board Update Portal Web Page..................................................... 24
5. Board Test System........................................................................................................ 26
5.1. Preparing the Board for the Board Test System........................................................ 27
5.2. Running the Board Test System............................................................................. 27
5.3. Using the Board Test System................................................................................. 28
5.3.1. The Configure Menu................................................................................. 28
5.3.2. The System Info Tab................................................................................ 28
5.3.3. The GPIO Tab.......................................................................................... 30
5.3.4. The I2C Tab............................................................................................ 31
5.3.5. The DDR3 Tab......................................................................................... 32
5.3.6. The SDI Video Tab................................................................................... 34
5.3.7. The HSMC Tab......................................................................................... 37
5.4. The Power Monitor............................................................................................... 39
5.5. The Clock Control................................................................................................ 41
5.6. Configuring the FPGA Using the Quartus Prime Programmer...................................... 43
5.6.1. Before Configuring................................................................................... 43
5.6.2. Configuring the FPGA............................................................................... 43
6. Document Revision History for the Cyclone V SoC Development Kit User Guide............ 44
A. Development Kit Components....................................................................................... 45
A.1. Board Overview...................................................................................................45
A.2. Programming Flash Memory.................................................................................. 46
A.2.1. CFI Flash Memory.................................................................................... 47
A.2.2. quad SPI Flash Memory............................................................................ 49
Contents
Cyclone
®
V SoC Development Kit User Guide
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